Hi,

I'm fairly new to OpenRISC and started experimenting with MinSoC in order to get something to work on the Hitex Bemicro SDK board (Cyclone IV). So far, I've compiled the GNU toolchain using script MOF_ORSOC_TCN_v5c_or32-elf.sh, only change is or1ksim version used is 0.5.0rc2. This was done on Cygwin 1.7.7 on a Windows 7 x64 PC. I'm using Quartus 10.0sp1 and dropped the verilog files in a project, compiled it and programmed the chip, it seems to be loading it properly.

I've set the PATH in cygwin to use the GNU toolchain and compiled the uart example, and I would like to be able to include the binary output as part of my Quartus project so it would be loaded in memory when programming (as opposed to loaded with the adv_debug_sys uart bridge) and so it boots to it right away. I've followed the minsoc.pdf (rev 1.0 Feb 1 2010) document on part 3 and it talks about the memory space of MinSoC and the .S files. Now the output of the make all in the /sw/uart folder has .bin, .or32, .vmem and .hex files. How can I take one/some of these in the Quartus project and tell the system to boot to it? Maybe I'm jumping some steps by not going through simulation first... I have a few issues using the adv_debug_sys with the JTAG embedded on the board, so if this post has no answer I'll be posting with this other issue. I'm not necessarely looking for a step-by-step tutorial but if someone could point me in a direction, in the documentation or on some other thread in the forum I could have missed, that would be great.

Many thanks for help,

Jean-Christophe

Hello Jean-Chritophe,

I would point you to the FAQ.pdf document under "minsoc/doc/". In there you find a point: Tweaks->I want my design to automatically initialize my firmware on power-up, how do I do that? It will guide you to do exactly what you want.

About your issues with the adv_debug_sys. Also check the other bullets in the same FAQ about the Advanced Debug System and take a look if your issues are not listed, explained.

Best regards,
Raul

Hi Raul,

Thanks for your help, I went through with the documentation and was able to boot the uart example on the Cyclone IV without harm. The main issue I faced was using a Memory Initialization File to load the code. I ended up using the In-System Memory Editor of Quartus to load the .mif file to the altsyncram program memory block (converted from the binary file) so I don't have to synthesize place and route all over again to drop some new code in. If anyone is interested to get the bin2mif conversion script I wrote up I'll be glad to send it, as I had trouble using SRecord to convert between file types.

Cheers

JC

I also use the same approach and convert the bin-file to a mif-file with help of srec_cat(Srecord-Tools), because the advanced jtag bridge did not work: srec_cat uart.bin -binary -Output uart3.mif -Memory_Initialization_File 32 A problem occurs, if the file size is not aligned to the memory format: srec_cat: uart3.mif: 256: The Memory Initialization File (MIF, Altera) output format uses 32-bit data, but unaligned data is present. Use a "--fill 0xNN --within --range-padding 4" filter to fix this problem. Using the option in the error message didn't produce a valid file: srec_cat uart.bin -binary -fill 0x00 -within uart.bin -binary -range-padding 4 -Output uart3.mif -Memory_Initialization_File Perhaps somebody knows how to apply it correctly.

Hi Vowi,

thanks for your input. Are you using version minsoc 1.0? In the current dev (trunk)version, virtual serial protocol over jtag is working as well as better support for cables. Maybe that helps for your issues with the pendrivelike development board.

Regards,
Raul