Hello,

What is the current status of the OpenRisc 2000 ?

Do you plan to use ADL like ArchC to test the instruction set before actual coding. It could help to make statistics and see what should be added/removed from the ISA.

http://archc.sourceforge.net

It looks like it can create models and also create tools to generate binaries according to ISA.

Hi,

I have initially worked on this and a student of mine will extend this to first prototypes including the open alternatives of the instruction set. We hope to make this available asap.

If you like, I can send you the link to the git when I uploaded first stuff.

Regards,
Stefan

It would also make sense to create a CGEN model to allow functional verification of the tool chain. I'll be interested to hear how you get on with ArchC. I've often heard it suggested, but never seen it used in practice.

HTH,

Jeremy

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I agree. Together with my student, who is from Zürich I will elaborate the current state of discussion and fixate a first functional model with the basic instruction set.

Up to now I worked a weekend with ArchC to evaluate the capabilities. One issue might be inclusion of core peripherals (TLB, Caches), to be modeled in the core or as peripherals. My proposal to map the configuration of them in the address space instead of using special move instructions, might influence this for example.

Currently we write the expose for the bachelor thesis, that is the implementation of a basic instruction set of OR2k in ArchC. The first milestone will be a snapshot of the current instruction set and open discussion points. Afterwards we will prototype the fundamental instruction set. I hope to get feedback of you then regarding the instruction set and further refinements before the building a timing-model and work towards implementation.

I will post a link to the git repository asap.

Furthermore, I am planning to find a student to work on LLVM for the new OR2k, just as prototype for the first. I estimate this for Q4.

Regards,
Stefan

Hello Wallento,

did you have any progress on the architecture description of or1k or or2k?

Best regards,
Raul