Wondering if anyone has done any power analysis on OR1K (specifically the dynamic power).

Please let me know if anyone has done so ( on FPGA or ASIC).


thanks,
Kaushik

Hi Kaushik

I'm not aware of any published work, but you might like to make contact with the Energy Aware Computing (EACO) project (www.cs.bris.ac.uk/Research/Micro/eaco.jsp) at Bristol University, which is a Europe wide research initiative looking at all aspects of low power computing.

I know they work with OpenRISC in Bristol, so you could ask if they have made any measurements.

If you do find anything, please let us know here.

HTH

Jeremy