1/1

|
I/DTLB Match Reg bit defs
by VlsiDave on Oct 19, 2011 |
VlsiDave
Posts: 16 Joined: Jun 28, 2011 Last seen: Dec 20, 2011 |
||
|
Hello again,
Could someone please clarify the apparent discrepancy in the architecture manual between section 8.5 and 8.4.6? In 8.5 ("Address Translation Mechanism in 32-bit Implementations") and elsewhere, page size is declared as 8kB (requiring 13 bits, [12:0]). Figure 8-3 confirms that the page number extends to address bit 13 ([12:0] describing the byte address within page). Why then does 8.4.6 show the VPN in bits down to bit 12? (specifically, bits [31:12] are identified as VPN). Shouldn't this field be in bits [31:13]? Thanks and regards, Dave |
|||
|
RE: I/DTLB Match Reg bit defs
by julius on Oct 19, 2011 |
julius
Posts: 363 Joined: Jul 1, 2008 Last seen: May 17, 2021 |
||
|
Hi Dave,
There was obviously some typos in the previous incarnation of the architecture spec, or perhaps some things accidentally left unchanged when they perhaps upped the page size from 4kB to 8. There's an updated version of the spec, still marked as "draft" but with this error corrected. I would reference it. http://opencores.org/ocsvn/openrisc/openrisc/trunk/docs/openrisc_arch_draft.odt Thanks, Julius |
|||
1/1

