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Adding a new core to MINSOC
by hmcx18 on Oct 25, 2011 |
hmcx18
Posts: 10 Joined: Sep 10, 2011 Last seen: Dec 5, 2012 |
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Nowadays, I am trying to add a new core "I2C controller core" which written by Richard.
What I have done is: 1, make changes in minsoc_defines.v. "`define APP_ADDR_I2C `APP_ADDR_DEC_W'h9d" "`define APP_INT_I2C 3" 2. make changes in "module minsoc_top ()" ~build tri-state `ifdef I2C assign scl = scl_en_o ? 1'bz : scl_o; assign sda = sda_en_o ? 1'bz : sda_o; assign scl_i = scl; assign sda_i = sda; `endif ~Instantiation of the I2C ~ I2C added to minsoc_tc_top (target 4) and I wrote a test program int main() { uart_init(); REG8(I2C_BASE + I2C_PRESC_HI)= 0xff; REG8(I2C_BASE + I2C_PRESC_LO)= 0xff; REG8(I2C_BASE+I2C_CTR) = I2C_CTR_EN | I2C_CTR_IRQ_EN; uart_print_short(REG8(I2C_BASE+I2C_CTR)); report(0xdeaddead); or32_exit(0); } I found the result is 0x0. Besides, whatever written into the registers which is RW, the reading out result is 0x0. Using gdb, the registers value is void(""). The way how I add the I2C core is similar with UART core. I don't know whether anyone can give me some advices. Thank you for your reply. |
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RE: Adding a new core to MINSOC
by rfajardo on Oct 26, 2011 |
rfajardo
Posts: 306 Joined: Jun 12, 2008 Last seen: Jan 6, 2020 |
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Hi,
I used the I2C core on minsoc extensively already. In the following I will give you an insight of my changes in order to do so: Since there is already a driver for using I2C and the firmware configuration expects the core to be on address 9d, I'd recommend you to switch `define APP_ADDR_AUDIO `APP_ADDR_DEC_W'h9d to `define APP_ADDR_I2C `APP_ADDR_DEC_W'h9d also switch: `define APP_INT_RES2 3 to `define APP_INT_I2C 3 Then, patch minsoc_top.v with the attached patch (i2c_patch). You will also need the minsoc_wb_32_8_bridge.v Verilog file under minsoc/utils to synthesize or simulate this design. Attached you also find an example firmware (i2capp.c) working with i2c through the i2c driver found under minsoc/sw/drivers/i2c.c. I hope that helps and let us know how far you get. Raul
i2c.tar.gz (2 kb)
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RE: Adding a new core to MINSOC
by hmcx18 on Oct 26, 2011 |
hmcx18
Posts: 10 Joined: Sep 10, 2011 Last seen: Dec 5, 2012 |
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Thank you very much! The registers can be written and read now.
I did not use minsoc_wb_32_8_bridge.v Verilog file. I suppose the width of data and address are not 32bits. So they can not be connected to wishbone interface directly. Thanks again! |
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