1/1 
|
OpenRISC on Lattice
by maresv on Nov 23, 2011 |
maresv
Posts: 22 Joined: Oct 28, 2008 Last seen: Jul 8, 2014 |
||
|
Is there anybobody who tried to port OpenRISC core to Lattice ECP or XP device?
Best regards Vit |
|||
|
RE: OpenRISC on Lattice
by maresv on Nov 30, 2011 |
maresv
Posts: 22 Joined: Oct 28, 2008 Last seen: Jul 8, 2014 |
||
|
Any OpenRISC on Lattice pioneer yet?
|
|||
|
RE: OpenRISC on Lattice
by olof on Dec 7, 2011 |
olof
Posts: 218 Joined: Feb 10, 2010 Last seen: Dec 17, 2018 |
||
|
Unfortunately no one that has released any information about it at least. There are also many other FPGA vendors that could need a port of OpenRISC, like siliconblue, tabula and archonix. As long as someone has a dev board, it shouldn't be that hard to do though. Mainly the clock generation that has to be changed, and memory interface, if it doesn't support the versatile memory controller.
-- Olof Kindgren ______________________________________________ ORSoC Website: www.orsoc.se Email: olof.kindgren@orsoc.se ______________________________________________ FPGA, ASIC, DSP - embedded SoC design |
|||
1/1