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Accurate modeling
by zhongyang on Feb 13, 2012 |
zhongyang
Posts: 21 Joined: Dec 24, 2010 Last seen: May 9, 2012 |
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Hi all,
I know or1ksim is not an accurate simulator, But now I want to modeling a cycle-accurate muti-core system based on openrisc. I want to know if I could compeleted it with systemc and ORPSoC C++ codes(generated by Verilator). I have 2 questions. 1. After I change the source ORPSoC to C++, could I use the C++ codes to build a loosy-time model in TLM2.0 like using or1ksim? 2. could the transfered C++ codes be muti-instantiated? Besides, I want to know if there are ways to optimize the clock results getting from simulations using ork1sim. Hope for you answers, Thank you. |
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RE: Accurate modeling
by jeremybennett on Feb 13, 2012 |
jeremybennett
Posts: 815 Joined: May 29, 2008 Last seen: Jun 13, 2019 |
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Hi all,
I know or1ksim is not an accurate simulator, But now I want to modeling a cycle-accurate muti-core system based on openrisc. I want to know if I could compeleted it with systemc and ORPSoC C++ codes(generated by Verilator). Hi zhongyang, Sounds like an interesting project. OpenRISC was designed for multi-core use, but as far as I know, there is no implementation yet (that has been published). From some discussions, I believe there are known weaknesses in the detailed specification that could cause problems. Julius Baxter is the expert on those. You might want to ask him on IRC (channel #opencores on freenode.net).
I have 2 questions.
1. After I change the source ORPSoC to C++, could I use the C++ codes to build a loosy-time model in TLM2.0 like using or1ksim? Well you could certainly wrap the model to provide either a loosely timed or approximately timed TLM 2.0 interface, but the model would not be any faster. The only reason to do this is if you require the specific interface. I suggest following the same general approach used when wrapping Or1ksim to create a loosely-timed TLM (see http://www.embecosm.com/download/ean1.html).
2. could the transfered C++ codes be muti-instantiated?
A good question. I'm not sure about instantiating mutliple Verilator models. I believe that works, but it is a question to check with the Verilator team (http://www.veripool.org/wiki/verilator).
Besides, I want to know if there are ways to optimize the clock results getting from simulations using ork1sim.
Or1ksim is a simple instruction set simulator. Its attempts to model clock cycles are hopeless. One future goal is to get rid of the clock cycle count, because it is meaningless. The only way to get reasonable cycle counts (i.e. within a factor of two in most cases), is to model the pipeline, and we won't do that in Or1ksim because it is not the purpose of that simulator, and the performance hit would be dreadful. So the simple answer to your questions is "no". That's why you should be using Verilator if you need to know cycle counts. HTH Jeremy
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