Hello all,

I'm currently investigating the or32 as a platform for fast SoC development with the advantage of the new IEEE 754-2008 standard; mainly with the new decimal64 float format.

Empowered with SilMinds IP cores and GCC 4.5.1 port (with its decimal64, decimal128 datatypes), a system might be built to run accurate calculation-extensive applications.

Now, I have some questions for OR1200 team. I'm looking forward for a friendly cooperation :)

1) What is the status of 64-bit double-floats? I only see 32-bit. Is there any possibility to work with 128-bit words?
2) FPU_OP[2:0] has 2 active bits to choose from 4 enabled operations. Is it safe for me to use the other 4, or should I use the custom opcodes?
3) I have very limited knowledge with GCC backend, is there a quick guide to make GCC emit proper opcodes when dealing with decimal 64/128 types? Can I use already defined register classes?
4) Is there any ASIC fabrication with 45nm or better? Is there an estimation about the design critical path delay in FO4?

Thanks in advance,
Tarek

Hi tarekeldeeb

The architecture specifies 64-bit (double precision) floating point operations, for example lf.mul.d.

I've just taken a look at Or1ksim (the architectural simulator) and I see it only implements the single precision opcodes. Given Or1ksim uses softfloat for its FP implementation, it should be relatively straightforward to implement the 64-bit opcodes as well.

I haven't looked at the FPU hardware, so I don't know if it implements the 64-bit instructions.

Your choice. The most exciting route would be to use the extra bits to extend the architecture and have that approved as part of the regular architecture update process. However unless your changes are accepted, your implementation is potentially not compatible with other people's work.

If you use the custom opcodes, you have the advantage that you remain a compatible implementation within the current architecture.

There are no quick guides to anything to do with GCC! It is 5 million lines of code that is nearly 30 years old and supports 40 different architectures. Unless you wish to become a GCC expert, which will take a long time, I suggest you find someone who already is expert

Declaration of interest: my company, Embecosm (www.embecosm.com) provides such services commercially.

Your better route might be to pick up the new LLVM compiler which Stefan Kristiansson and others are working on. It is a much newer and better documented compiler, so should be easier to extend. I don't know how far Stefan has got with floating point support yet.

I don't understand this question. Leading edge commercial ASIC fabrication is now around 20nm. I believe sesearch fabrication is down to the 5-10nm level.

This is an interesting project. I would encourage you to discuss it further on the development mailing lists and on IRC (freenode.net, channels #opencores and #openrisc).

HTH,

Jeremy

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Thanks in advance, Tarek

Thanks Jeremy for this informative reply.

So the double float exists in the architecture specifications, but seems missing in both the rtl and the simulator. This would require some work from me.

LLVM is still in early development (as it seems to me), I find the Floating-point support still sits in their TODO:
https://github.com/skristiansson/llvm-or1k/blob/master/README.or1k

Regarding the ASIC, I am asking about or32 implementations. Is there any published result with 45nm tech or better?

I tried to chat on the irc channel a couple of times last week, with no replies :(
Maybe I will try another time ;)

Thanks again Jeremy,

-Tarek

hi Tarek

I had a small discussion with Stefan on IRC yesterday, who confirmed that this is TBD. My suggestion was that if you are going to modify the compiler, LLVM will be much easier to learn.

I try to collect known implementations in ASIC on the Wikipedia page http://en.wikipedia.org/wiki/OpenRISC. I'm aware of the Jennic/NXP Zigbee chip and the Samsung STB chip, both of which I would guess are 65 or 45nm. I don't know if the TechEdSat project is ASIC or FPGA.

Look forward to seeing you on IRC. I am usually online during UK work hours.

Best wishes,

Jeremy