I want to get an estimation of the percentage of the area used by OR1K when implemented on a FPGA. Can you help me to understand the procedure? For examples what I think is I should find the number of gates used by OR1K and also find the number of gates on the FPGA and I can find the percentage. but what about other elemnts such as LUTs, multipliers, deviders and etc.

I would be grateful if u can help me with this.