Hi,
im using ML505 FPGA,ise 31.2 version.
i have generated DDR2 interface module using core generator(MIG) with frequency 200Mhz
and instantiated in xilinx_ddr2_if.v module.Added usr_clk as jb did for ml505.
comming to DCM i generated using same core generator(dcm_adv)with differential clock input and outputting wishbone clock 50Mhz,ddr2_if_clk=200Mhz and clk200=200Mhz.
Comming to orpsoc_top.v im using advance debug module and regarding TAP im using xilinx internal jtag.

i generated bit file and dumped into fpga.
advanced jtag bridge was working fine and enumerating jtag was done.
while loading a small test case the follwing messages were displayed.

Target device 0 JTAG ID=0xc2a96093
xilinx IDCODE ,assumning internal BSACN MODE
(using USER1 instead of DEBUG TAP command)
IDCODE sanity test passed , CHAIN OK!
JTAG bridge ready!
RSP server sending stall command 0x1
got pipe event from monitor thread
ERROR!WB bus error during burst write , address 0x0 (index 0x0),retrying.
ERROR!WB bus error during burst write , address 0x0 (index 0x0),retrying.
ERROR!WB bus error during burst write , address 0x0 (index 0x0),retrying.
ERROR!WB bus error during burst write , address 0x0 (index 0x0),retrying.
ERROR!WB bus error during burst write , address 0x0 (index 0x0),retrying.
ERROR!WB bus error during burst write , address 0x0 (index 0x0),retrying.
ERROR!WB bus error during burst write , address 0x0 (index 0x0),retrying.
ERROR!WB bus error during burst write , address 0x0 (index 0x0),retrying.
ERROR!WB bus error during burst write , address 0x0 (index 0x0),retrying.
ERROR!WB bus error during burst write , address 0x0 (index 0x0),retrying.
ERROR!WB bus error during burst write , address 0x0 (index 0x0),retrying.
MAX wb bus errors reached
Error writing memory :"max wishbone bus errors".
ERROR! wb error during burst write ,address 0x0 (index 0xFFFFFF00),retrying!
CRC ERROE! match bit after writeis 0 (computed CRC 0xa13dcoc7) Retry...
ERROR!WB bus error during burst write , address 0x100 (index 0x0),retrying.
.
.
.
.
MAX wb bus errors reached
Error writing memory :"max wishbone bus errors".



Could someone help me,
Thanks.