Hi, I am currently trying to make ORPSoC work correctly on an Actel A3PE1500 FPGA in a PQ208 package, which is exactly the same as the one used on the development board.

I am however planning on making some extensive changes to the design after it is up and running in order to make it more radiation tolerant, which has led me to trying to make it work without using the scripts whatsoever and instead only using the verilog source files in a project in Libero.

The other (and also, more important) reason that I am not using the scripts at all is that I have found it impossible to get Libero (and thus modelsim too) to work correctly on Ubuntu (and other linux distributions). I suspect this has to do with floating license issues, but either way lets assume that I have to use the windows Libero environment.

As far as I can tell (from what I have read from various sources), the SoC looks first at the bootrom.v file, where it is then instructed to load the program file out of the flash memory and into the SDRAM. According to simulations in Modelsim this seems to be working correctly, although I can't be too sure as the simulation goes on forever before the program is actually loaded, and so I can't see if it reacts correctly afterwards.

I happen to have another Actel development board that I can use to test if it is working correctly on hardware, which leads me to the million dollar question:
How do you program the FLASH memory via the FPGA?

From the documentation it says that all steps up to and including programming file generation are done with the scripts, and that the device programming must be done using the flashpro tool under Windows.

"The .adb file resulting from place and route can be opened in the Actel Designer tool and
a programming file generated there.
Once this programming file is created, Actel�s FlashPro can used to program the
ORDB1A3PE1500 board."

The readme file in the SPI flash programming application also simply notes that it needs to be loaded into the flash memory, but never states HOW it is done.

If you could please enlighten me as to how it is done with the development board, that would be greatly appreciated.

Hi, it shouldn't be too hard to get those working under Ubuntu. I wrote them to work under Ubuntu, which I was using at the time. I suspect none of the script infrastructure will work (I think) under Cygwin/Windows.


You'll just have to simulate it. Put in a small program and see if that boots. Trust me, it'll be a lot quicker debugging stuff that way than on the board (from memory those Actel tools were as slow as a wet week and then some)!

I guess you're aware that the bootrom program is selected by the #define in the board.h file? Be sure to delete the generated bootrom.v if you've changed the board.h file


Right, so, first time, the FPGA Is programmed as usual, but before there's an image in the SPI flash it will proceed to read junk out of it at reset.

So you must, put the ORPSoC image on the FPGA, then you can program the SPI flash by running some software on ORPSoC. The software to do this is is in orpsocv2/sw/apps/spiflash/. The README in there explains the process of programming the flash via SPI for the bootloader to be able to boot from it.

When compiling it you must point the scripts at the binary image of the software you want to put in the SPI flash. Note that this binary image must have its first 4 bytes set to the size of the image (ie. if the image is 32k bytes big, the first 4 bytes in the SPI flash would be 0x00008000.

Once you have compiled the spiflash app, you then download to ORPSoC via a debugger, execute it, and it will give you a console over the UART to program, verify and inspect the flash. Once that's done, the system should then boot the code you've put in the flash.

Let me know how you go.

Julius

It isn't the scripts that don't work correctly, but Libero and Modelsim that I can't get to work correctly. The scripts use these programs and thats why I can't use the scripts correctly. They do however work for testing the design etc, but that doesn't help me much since I have to do the place and route in Windows anyway (as well as the programming).



Thanks, I will give this a try.




Since I first want to test this on another FPGA development board that I have available, the setup is a bit different from the normal ORPSoC development board. And even afterwards when I will be using the same FPGA that is used for the ORPSoC development board (A3PE1500), it will be on my own hardware board, which means the connections and pin layout etc. will be different.

For this reason I need to have a bit more information as to how to connect the debugger, or even which one is used? Can I do this via the normal JTAG with the flashpro3 programmer? Or do I need to define and then connect the JTAG debugging ports to pins on the FPGA, and then somehow connect flashpro3 to those ports as well? Or is some other debugger needed to accomplish this?

Also, I see you mentioned that it is connected via UART. Must I connect the UART seperately to the PC via a COM port or USB or something? Or also somehow connected to the debugging hardware?

Sorry for all the questions, but I can't seem to find any more information anywhere else about this. Thanks for the help so far!

Kind Regards
Francois Nolte