What is the procedure for loading orpsoc and an application to a board?

1. Use the openrisc toochain to make a program
or32-elf-gcc -mnewlib -mboard=atlys test.c -o test.exe
or32-elf-objcopy -O binary test.exe test.bin
bin2binsizeword test.bin test_sz.bin

2. Go to "orpsocv2/boards/xilinx/atlys/backend/par/run" and type "make orpsoc.mcs BOOTLOADER_BIN ?= ~/orpsocv2/boards/xilinx/atlys/sw/src/test/test_sz.bin"

3. Use impact to program the SPI flash

I didn't see Openrisc start running the test program. Is my procedure correct?


I would like to use Xilinx ISE(gui) to do the job, rahter than use the Makefile.

Thus I need to what verilog files should I add to my Xilinx ISE project.
There're two rtl directory:
orpsocv2/boards/xilinx/atlys/rtl
orpsocv2/rtl
What is the purpose to put verilog files in different directory?
If I use Atlys, what files will be used?

I need to know how the Makefile work so that I can do the same in ISE.

Thanks.

To answer the question of the two RTL directories - one is for IP which can be shared between multiple board builds, and one is for IP which is specific to that board build.

Your method seems correct to build the SPI image. Are you sure the bootrom in the RTL is the one which boots from the SPI flash?

Can you simulate it?

You should be able to get the project into ISE if you like, but I really find the Makefile flow is far more productive, although perhaps a little less user-friendly to begin with.

Dear Julius,
I have the same problem and I see an error in the simulation level with the FUSE command:

ERROR: Simulator:702 - Can not find design unit work.orpsoc_testbench in library work located at isim/work

Any idea?

I'll appreciate if you tell me a way to run the simulation with ISE gui rather than makefile. that way these errors seems to be solvable.

Thanks
Masoud