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execption handling mechanism in or1200 by kevintan on Sep 27, 2013			kevintan Posts: 1 Joined: Aug 1, 2013 Last seen: Oct 14, 2013
In or1200, when an exception occurs, the machine first saves the current state(PC-->EPCR, SR->ESR)and flushs the pipeline, and then execute the exception handler. I am a little bit confused when reading the verilog rtl code. 1, how many cycles does it take to flush the pipeline? 2, what is the return address?id_pc, ex_pc, or wb_pc? In or1200, when an exception occurs, the machine first saves the current state(PC-->EPCR, SR->ESR)and flushs the pipeline, and then execute the exception handler. I am a little bit confused when reading the verilog rtl code. 1, how many cycles does it take to flush the pipeline? 2, what is the return address?id_pc, ex_pc, or wb_pc?

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