Hi

First of all thanks for the great work on this project!

I'm using minsoc and have uploaded my bitfile to my spartan3an and now I'm trying to upload software. I'm using a USB cable to connect my board to the PC and I'm working under cygwin.

When ever I run adv_jtag_bridge xpc_usb I get an error saying:

Failed to find Xilinx Platform Cable USB
Failed to initialize cable 'xpc_usb', aborting.

I looked up the VID/PID in:
/minsoc/rtl/verilog/adv_debug_sys/Software/adv_jtag_bridge cable_xpc_dlc9.c

It showed

// Note that this is based on the UrJTAG driver for the XPC-USB,
// which was 'experimental' at the time.
// It only supports bit-bang mode, and therefore will not be fast.

// USB constants for the DLC9
#define XPCUSB_VID 0x3fd
#define XPCUSB_PID 0x08

// Bit meanings in the command byte sent to the DLC9
// DLC9 has no TRST bit
#define XPCUSB_CMD_TDI 0x01
#define XPCUSB_CMD_TDO 0x01
#define XPCUSB_CMD_TMS 0x02
#define XPCUSB_CMD_TCK 0x04
#define XPCUSB_CMD_PROG 0x08


Under device management I found the VID/PID of my device.

USB\VID_03FD&PID_0008\6&9C263C6&0&1


So I'm basically wondering if I've missed something along the way. If the IDs match should xpc_usb not be able to find the FPGA?

Also should I uncomment the defines and build my bit file?

Sorry for the long question but it's been a long day and I'm tired of fruitless googling.

Thanks
Aaron