



change tag_top.v and adv_debug_sys/*.v reset signal to low active, it doesn't work on De2_115
by dabing on Nov 27, 2013 |
dabing
Posts: 8 Joined: Apr 25, 2011 Last seen: May 22, 2014 |
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I change reset signals of tag_top.v and designs in adv_debug_sys to low asynchronous active. As follows:
tag_top.v assign test_logic_reset_o = test_logic_reset; => assign test_logic_reset_o = ~test_logic_reset; i_dbg_wb.v biu_rst =rst_i | biu_clr_err; => biu_rst = rst_i & (~biu_clr_err); and other codes in always block. always @(posedge clk or negedge rst_i) Before my change, it works, althrough unstable. But now it doesn't work. It repors: adv_jtag_bridge ft245 'usb_blaster' interface using libftdi current latency timer: 2 Enumerating JTAG chain... Devices on JTAG chain: Index Name ID Code IR Length ---------------------------------------------------------------- 0: (unknown) 0x14951185 -1 Target device 0, JTAG ID = 0x14951185 ERROR! Unable to autoprobe IR length for device index 0; Must set IR size on command line. Aborting. I wonder how I can fix the problem. Is there good material to analyze jtag and adv_debug_sys code? Are there ways to simulate jtag and adv_debug_sys rtl code?
jtag.rar (33 kb)
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