I got thru a compiled MinSOC design and programmed my custom board with a Cyclone III (required fixing some files, or1200_tpram_32x32 and or1200_sram_2048x32 in the or1200 directory because the default files were choking on Altera 13.1 with all kinds of errors). Anyhow, I tried running the uart example using the adv_jtag_bridge and gdb as per the Release 1.0 software debug setup and I am getting a hanging debug...I will include a screengrab..not sure how to figure out what's going on or why I'm hung up?