This is my first project on openRISC. I want to synthesize the OpenRISC processor based SoC and try it out on Xilinx Virtex-5 based ML-505 board.But I could not find my board in "openrisc/trunk/orpsocv2/boards/xilinx" directory.

How should I go on synthesizing this project on my board?

Should I change the ucf files of ML501 for my project? I tried replacing the location constraints of the NETs with the corresponding pins of my board.But how should I take care of the other constraints?

Thanks,
Tanmay

Hi tanmay,

For synthesizing the OpenRISC processor you need to have xilinx ISE tool .
The only RTLs that differ for ml505 board are RTLs of DDR2 controller and you need to generate it by MIG.

For the location constraints you can download the ml505 schematics file and check for location constraints in that file and accordingly update the ucf file.


Thanks,
Karthik

Hi karthik,
I tried running the project on my board with the modified UCF file. I ran simple "Hello world" test example on my SOC. The process completes without any errors. But the board does not display anything through UART.I tried setting baud rates but nothing gets displayed.

I would be very grateful if you could send me the ucf file for the board. Please find my ucf file in the attachments.

I would like to make a correction here. The project which I used to display "hello world" is MINSOC and it is not displaying back anything.

Hi Tanmay,

Before you give a testcase on FPGA first run the testcase "uart-simple" in simulation and then set the baud rate in teraterm to 115200. This baud rate worked for me.

Thanks,
Karthik.

Hi karthik,
I am still facing issues with implementation of the MINSOC. I would be very glad if you can help us with the ucf , build.h and other changes required for porting MINSOC to ML505. I don't know why it isn't displaying anything.
Actually,porting either MINSOC or ORPSOC will work for me. While trying to implement ORPSOC,I get an error during mapping.
"NGDBUILD Design Results Summary:
Number of errors: 0
Number of warnings: 15

Writing NGD file "orpsoc.ngd" ...
Total REAL time to NGDBUILD completion: 13 sec
Total CPU time to NGDBUILD completion: 13 sec

Writing NGDBUILD log file "orpsoc.bld"...

NGDBUILD done.

#### Mapping ####
make: *** [orpsoc_mapped.ncd] Error 2"
I think there is a problem with ucf. Can you please guide us with the steps for the implemntation of ORPSOC? Or we can do this on email.

Thanks...

Hi Tanmay,

If possible post your error completely here or you can also try it in the xilinx forums


Thanks,
Karthik

You need a license file!I have encountered this problem.
1. Launch Xilinx Setup
2. Choose "System Edition"
3. Select "Xilinx License Configuration Manager"
4. Select "Locate Existing License"
5. Next
6. Click "Copy License"
7. Select included license xilinx_ise.lic
the xilinx_ise.lic ,you could find in website or use this one.