I want to do some power analysis on or1200 processor using Design Compiler.

I am trying to simulate the orpsocv2 testbench with my synthesized netlist of or1200 instead of the rtl to obtain the vcd. Following are the errors that I get:-

** Error: netlist_sim_ms/sim/run/../../bench/verilog/or1200_monitor.v(122): Failed to find 'get_gpr' in hierarchical name.
** Error: netlist_sim_ms/sim/run/../../bench/verilog/or1200_monitor.v(122): Failed to find 'get_gpr' in hierarchical name.
** Error: netlist_sim_ms/sim/run/../../bench/verilog/or1200_monitor.v(340): Failed to find 'ex_dslot' in hierarchical name.
** Error: netlist_sim_ms/sim/run/../../bench/verilog/or1200_monitor.v(605): Failed to find 'mem' in hierarchical name.
** Error: netlist_sim_ms/sim/run/../../bench/verilog/or1200_monitor.v(608): Failed to find 'mem' in hierarchical name.
** Error: netlist_sim_ms/sim/run/../../bench/verilog/or1200_monitor.v(624): Failed to find 'miss' in hierarchical name.

Has someone tried this before. Can someone please help me with this.


Thanks in advance