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fusesoc verilog
by hyder1984mohi on Feb 15, 2015 |
hyder1984mohi
Posts: 3 Joined: Feb 12, 2012 Last seen: Feb 6, 2020 |
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Can I modify the verilog files of mor1kx inside the fusesoc and run a new application simulation.
what I found is the verilog files in mor1kx inside the build folder are being created after calling>> fusesoc sim mor1kx-generic --elf-load hello.elf --trace_enable --vcd how can I change openrisc rtl files and try to simulte after that?? Thank you for your help in advance. if you need more info please inform me Haider |
RE: fusesoc verilog
by hyder1984mohi on Feb 16, 2015 |
hyder1984mohi
Posts: 3 Joined: Feb 12, 2012 Last seen: Feb 6, 2020 |
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the problem I got is inside
or1k/orpsoc-cores/systems/mor1kx-generic/mor1kx-generic.core the code is CAPI=1 [main] description = "Minimal mor1kx simulation environment" depend = mmuart mor1kx ram_wb uart16550 uart16550_model vlog_tb_utils verilator_tb_utils wb_bfm wb_intercon jtag_vpi jtag_tap adv_debug_sys ..... how I can see and modify mor1kx and rum the simulation again. thanks |
RE: fusesoc verilog
by olof on Feb 16, 2015 |
olof
Posts: 218 Joined: Feb 10, 2010 Last seen: Dec 17, 2018 |
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Hi Haider,
The best way is to override the mor1kx core. The following steps should work for this 1. Create a new directory (we will refer to this directory as $corelib from now on) 2. Clone the mor1kx git repository here. (cd $corelib; git clone https://github.com/openrisc/mor1kx) 3. Copy mor1kx.core to $corelib/mor1kx (mor1kx.core should be in $HOME/.local/share/orpsoc-cores/cores/mor1kx if you used fusesoc init to get orpsoc-cores) 4. Edit mor1kx.core and remove the section [provider] and everything below (This will stop FuseSoC from downloading the core and use files from the directory containing the .core file instead. 5. Edit fusesoc.conf in your workspace directory (or in $HOME/.config/fusesoc/ if you want it for all workspaces that don't have its own fusesoc.conf) and add the path to $corelib at the end of the line that begin with "cores_root = ". (This will tell FuseSoC to look for additional cores in $corelib and override cores that it has already found. You can also use fusesoc --cores-root=/path/to/$corelib ... if you don't want to edit config files 6. Verify that the new core is found by running fusesoc core-info mor1kx. You should see that "Core root: " is set to $corelib/mor1kx Now you can hack the code in $corelib/mor1kx as much as you want and just run fusesoc sim --force mor1kx-generic --lots-of-other-options Pheww.. That was a long post. It once again reminded me that I should start writing some proper documentation for FuseSoC :) Please let me know how it goes Best Regards, Olof |
RE: fusesoc verilog
by hyder1984mohi on Feb 19, 2015 |
hyder1984mohi
Posts: 3 Joined: Feb 12, 2012 Last seen: Feb 6, 2020 |
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Thanks you are great..
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