I seem to have fallen into some issues when building for the DE0-Nano. I have an OSEPP FTDI module connected to the board with RX on Pin T15 and TX on Pin 13. I followed an older tutorial from mintSoc that said in order to change the pins for the board the file pinmap.tcl would have to be updated; however, for some odd reason when I build the system, my log indicates that the new pinmapping was ignored. Can anyone provide assistance.

modification to pinmap.tcl
#UART0
set_location_assignment PIN_T15 -to uart0_srx_pad_i
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to uart0_srx_pad_i
set_location_assignment PIN_T13 -to uart0_stx_pad_o
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to uart0_stx_pad_o

log output
Info (169178): Pin uart0_srx_pad_i uses I/O standard 3.3-V LVTTL at A14
Warning (169203): PCI-clamp diode is not supported in this mode. The following 1 pins must meet the Altera requirements for 3.3V, 3.0V, and 2.5V interfaces if they are connected to devices other than the supported configuration devices. In these cases, Altera recommends termination method as specified in the Application Note 447.

reference tutorial on mintsoc
http://wiki.mintsoc.org/doku.php?id=run_programs_on_the_altera_de0_nano_board

Have you tried asking your question in the Terasic support forum?

Dan

I figured since it was an issue with the fusesoc the successor of orpsoc and the issue is with the build system not updating correctly when I follow the various tutorials in changing the pinmap.tcl file that these forums would be a better venue for the question. Is the Terasic support forum a better area to ask this question. I only assumed that orpsoc and fusesoc questions would be better asked here I was unsure.

The board works fine btw and a demo uart circuit i created in Quartus works fine.

According to a quick Google search, it looks like your problem is stemming from using your pin as both a configuration pin and a user I/O pin. So, here are some ideas:

• Are you sure you have the right pin assignment? If those two pins are configuration pins for your part, it's unlikely that they are the right pins to choose for a hard-wired UART connection.
• Is it possible to connect your UART pins to some other pins from the core? The mintsoc instructions make it look like the UART pins are chosen out of many available pins. Are there others that would work for you?

Dan

I only looked through the pinmap.tcl before selecting the pins to use. The OSEPP FTDI module had pins extruding perpendicular to the female connection which prevents me from connecting it to the board(shorts the board) in the same way that it seems to be connected with the ebscom uart module in the 2013 ORPSoc Workshop and the pins aren't set close enough so that I could simply place it on top of the same pins as shown in the mintsoc tutorial since it would change the position of ground and I would have to find and update verilog file and the pinmapping. I can however easily change the pin placement; however, instead of switching it at first I actually created a UART test circuit on the DE0-nano with the same uart pin placement to check if it was an issue with the board or the module. I only assumed the pinmap was fine since the test circuit worked without issue and checking the pinmap it seemed like a random pin placement with its only dependency that the ground for the module was on one of the grounded pins for ease of use.

The issue with the pinmap not updating was easily fixed with the removal of the build directory; however, the main issue regarding an empty uart connected terminal has not been remedied. I have also fallen into another issue regarding the below error message as well though this is only recent.


INFO: Preparing adv_debug_sys
INFO: Preparing altera_virtual_jtag
INFO: Preparing gpio
INFO: Preparing i2c
INFO: Preparing jtag_tap
INFO: Preparing mor1kx-3.1
INFO: Preparing or1200
Traceback (most recent call last):
File "/usr/local/bin/fusesoc", line 344, in
run(parsed_args)
File "/usr/local/bin/fusesoc", line 279, in run
args.func(args)
File "/usr/local/bin/fusesoc", line 57, in build
backend.configure()
File "/usr/local/lib/python2.7/dist-packages/fusesoc/build/quartus.py", line 38, in configure
super(Quartus, self).configure()
File "/usr/local/lib/python2.7/dist-packages/fusesoc/build/backend.py", line 65, in configure
except urllib.URLError as e:
AttributeError: 'module' object has no attribute 'URLError'

I was able to contact the original author of the tutorials who informed me that the the build error seemed to be caused by the Opencores website being down so a quick fix was to use mor1kx instead of or1200. Though the build error has been fixed I still do not get any output from the board.

I made an unrelated uart example and connected it to the same pins to test the UART to determine if the issue was hardware; however, it worked fine meaning the issue is with the mapping. I am expecting the terminal with the serial connection `Terminal 2 in the tutorial` to display the same output as the simulator example; however, it remains blank.

Any assistance would be very helpful at this point.

Thinking about it, one problem fits your description nicely: the serial port is set up improperly --- wrong baud rate, number of bits, parity bit, etc. Can you apply a scope of any type to the serial port and see what's going on?

Dan

I am not completely sure of the issue but I rebuilt everything from scratch, loaded it in quartus and tried again and it worked. I am not sure of what the issue was at all. Their was a seperate issue with continuing the program later on though that was fixed with space and ^j, which i still do not completely understand but works for now.

Thank you for the help

~Kyle