Hi all,
I'm working on a project "FPGA implementation of a low area 32-bit AES".Here the 128-bit aes is implemented as four 32 bit blocks, provided software key expansion is to be used >for generation and storage of keys in a BRAM of FPGA(Spatan3) and those keys are accessed for other operations(shift row,mix column etc.). The whole setup is to be >implemented in FPGA(Spartan 3).Xilinx ISE software is used. Im running short of time to complete this project. Could u please help me by providing ideas for that software key >expansion and vhdl code for this aes technique..
Pl help me out...

Hi,

I couldn't fully understand your problem. I only understand you want to store a key in memory.

-Do you want too to decrypt or encrypt something in any way?
-Is this FPGA connected to a PC or what is the idea of having stored keys?
-Would you prefer to do it via software or hardware is fine? You could load a CPU on the FPGA and do the work.

I am no encryption expert and maybe only few are here so you probably have to explain yourself a little since you are trying to use a tool to solve a problem and we know this tool but not the problem :-).

Best regards,
Raul

I just noticed there is an AES IP core you might be interested on, and maybe on contacting the maintainer.
http://www.opencores.org/project,aes_core

Good luck,
Raul