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ADC which gives 8 parallel digital outputs
by eemrem on Nov 29, 2010
eemrem
Posts: 1
Joined: Mar 31, 2010
Last seen: Apr 14, 2011
Hi.
I'm trying to implement real time kalman filter with FPGA for induction motors. So I need 8 channels 12 bits Analog to digital converter,but this converter must capture 8 analog input channels' datas at the same time and convert the 8 inputs channels' datas at the same time then give them as outputs at the same time to FPGA Xilinx Virtex 5 board. But I can't find a kit or evaluation board which works like this. Is there anyone who can help me about this subject,Please?
RE: ADC which gives 8 parallel digital outputs
by abhishekj on Nov 29, 2010
abhishekj
Posts: 1
Joined: Sep 20, 2010
Last seen: Feb 24, 2014
You can use virtex 5 LXT ML505 evaluation board of xilinx. This is very good evaluation platform. i am using this for my project but i did'nt use ADC for taking input. So if you want you can check out this platform. Best of luck.
RE: ADC which gives 8 parallel digital outputs
by aTomek132888 on Nov 30, 2010
aTomek132888
Posts: 2
Joined: Mar 13, 2010
Last seen: Jun 19, 2012
You can use virtex 5 LXT ML505 evaluation board of xilinx. This is very good evaluation platform. i am using this for my project but i did'nt use ADC for taking input. So if you want you can check out this platform. Best of luck.

Hello. You should look on exercise describing ISERDES/ISERDES_NODELAY primitive in Virtex 5.
xapp1064 and xapp1071 describe highspeed deserialization for Spartan 6 and Virtex 6.
I use this documents in similar problem but using Spartan 6.

Good Luck
RE: ADC which gives 8 parallel digital outputs
by abasili on Dec 3, 2010
abasili
Posts: 5
Joined: Aug 5, 2008
Last seen: Nov 29, 2013
What is the sampling period on your kalman filter? Have you considered the possibility to have a sample&hold + analog multiplexer in order to digitize 8 channels with one channel adc?
We follow this approach in particle physics experiments, where several channels (up to 128) are sampled with an external trigger and an analog multiplexer will provide analog signal to the adc.
Sample&hold approach will let you save on the adc side, but you will need to deal with channel to channel crosstalks (depends on the accuracy you need) and also provide a good zero-returning function to reset the hold circuit for the next trigger (a minor issue since I believe you are sampling at a fixed frequency).
Hope that helps,

Al
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