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Wishbone to MIG interface
by pbaker on Apr 5, 2011 |
pbaker
Posts: 1 Joined: Sep 9, 2010 Last seen: Jun 1, 2011 |
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I have submitted a new project for a Wishbone compliant wrapper for Xilinx's Memory Interface Generator which permits bursting access to the memory. Attached is the initial paper, comments and suggestions are welcome.
WB2MIG.pdf (118 kb)
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