OpenCores
no use no use 1/1 no use no use
Open8 URISC Interrupt
by abi01shek on Apr 8, 2011
abi01shek
Posts: 1
Joined: Feb 18, 2011
Last seen: Feb 26, 2020
Hi, I am trying to implement an hardware interrupt on the open8 core, I used modelsim for simulation and have connected the core to a RAM (the internal BRAM used in SPARTAN3E). I use this RAM as the instruction memory and data memory.

I enable the interrupt input1 for few clock cycles and disable it. I can see the return address being stored in the stack and control transfers to the address 0x0000. I used the RTI instruction to return from the interrupt. The RTI (return from interrupt) instruction, pops the values of the return address from the stack but does not load the program counter with the return address. it instead loads 0x0000 into the PC. Below is the assembly code

addr inst
144 0x00
interrupt
0 some code (is this the ISR?)
10 RTI
supposed to PC
How do i implement the interrupt and interrupt subroutine in assembly code for open8? Is there any specific method of implementaiton?

Thanks,
PolySPARC
no use no use 1/1 no use no use
© copyright 1999-2025 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.