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VHDL vs Verilog
by MarcAnderson on Aug 16, 2011
MarcAnderson
Posts: 3
Joined: Aug 13, 2011
Last seen: Sep 1, 2011
Hi,

I'm new to FPGA, last time I did any programmable logic was PAL using PALASM, having jumped from hardware design to software, Assembler, Pascal, C/C++, Java.

I'm interested in getting back into hardware design and am looking at the DE0-Nano from Terasic as it seems to have a good feature set at a very reasonable price. I have downloaded the Quartus II software and am playing with some code.

I see that this suit has compilers for Verilog HDL and VHDL. Is there an advantage of one over the other?

Some of the things I am interested in playing with are Space Invaders implemented in FPGA. The other thing is stack processors used for Forth.

I would be interested in hearing others peoples thoughts.

Regards
Marc

RE: VHDL vs Verilog
by jdoin on Aug 21, 2011
jdoin
Posts: 51
Joined: Sep 1, 2009
Last seen: Sep 27, 2024
Hi Marc,

I replied to your other thread Verilog better than VHDL!!, that seems to be the same subject as this one.

Jonny Doin
no use no use 1/1 no use no use
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