Hello,

I have a working design in Verilog (that i have implemented) of a Network on Chip module. The design is of a Centralized Adaptive Routing system: it takes a mesh-topology, and creates routing tables for all modules. the routing pathes are determined in XY-YX topology.

I can give more details and a full explanation of the system on request.
I am planning to start this project on opencores, but i am looking for an experienced partner to help me build a good verification environment.
Any volunteers?

regards,
yousef

Hello Yousef,
I am willing to contribute to the project. I am a design engineer with 10yr exp with syn,sta. Have exp in verification, but did not work on OVM,UVM methodologies.
Let me know if I can help you.
regards-pruthvi

I highly appreciate this!

I will send you a small email right now with additional information! let me know that you have gotten it.

Thanks

I forgot to ask you for your email :)

Basically the story is like this:
I am an EE engineer (only recently graduated) majoring in microprocessors and nano-technology.
The NOC design was part of a project that i have done during my studies, what i am going to do now is go over this design, redesign it with additional specs and improvements and verify it.

I will write a spec document (within the next two weeks) and i will send you the spec document along with additional information regarding the design. I need your help to evaluate the spec, and to give me your opinion / changes.. anything! ill be even glad if you wanted to join in!

Does that sound good?

-Yousef

Hi,

I am not an expert but have a sound knowledge in design and verification with UVM and VMM methodology.I did couple of SOC Verification projects and Designed single module too.


let me know if i can contribute in any way,it will advance my skills and i love to learn new things specially Technical .

Regards,
Vinay

Hello,

I would like to contribute in the design side of NoC. I have experience in using NoC for a very complex SoC. I have done a design of architecture and implementation of NoC using the modules available in the library. But in this case as I understand you are trying to do implementation of NoC modules, which caught my attention. Let me know how can I contribute to this
my email is pbijoy@gmail.com

regards
bijoy

great, can you guys leave me your email here?
or send it to ybadran@gmail.com incase you wish to keep it private.

I will send you a documentation once its done, and ill be asking you for your opinion. right now im aiming on getting the routing level (pathes for sending the packets) but if you wish we can also create the routers themselves along with the buffers and protocol.