Hi,

I am designing a micro-architecture for MIPS processor. To be able to test the functionality of the processor, I need to embed some opcodes in a text memory. Currently I am doing that by inserting text opcodes manually for each word/instruction (in a small memory array that I use through simulation). The attached image shows an example.

I need to get gcc to produce a pure opcodes for MIPS instructions without the other sections, data, and other stuff that gcc usually produce. Just MIPS instruction (code section).

Thanks,
Hesham

> pure opcodes for MIPS instructions without the other sections, data, and other stuff
You should read about `objcopy' tool, one can use it to convert .elf to .bin, e.g.:
objcopy -Obinary output.elf output.bin

Then you can easily use some script to generate include file from this binary.
Another option is to use `objdump' + some script.

offtop/2: hm, it's quiet strange that I've received e-mail notification about this post only today. Sorry for possible necroposting.

I don't know if this is exactly what you want, but the "Ion" MIPS 1 project in the Processors section has a Python utility that converts the binary output of objcopy into a VHDL include file. This is done by creating a constant array of code data that can be copied into an embedded ram block at initialization. You could probably do something similar to fit your needs and is probably the most portable.

Some synthesis software recognize data formats that objcopy outputs to be used for memory initialization. Altera, for instance, recognizes the Intel HEX format that can be produced by objcopy.