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PCI transfer rate
by Unknown on Jan 28, 2004 |
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Hello,
Is it possible to achieve high transfer rates (120 MBytes/s) using Opencore PCI? I have succesfully implemented test application in Memec Spartan 2 Board (rev.2), but transfer rates using write(SPARTAN_FD, buf, buf_size) does not exceed about 1.5 MByte/s. This write() function for large buf_size parameter is implemented in spartan_drv.c by sending 32 bit word by word . To sum up : Is it possible to initiate 0 wait state burst tranfer? I would be gratefull for response, stef PS. I plan to release to OPENCORES my Smith-Waterman algorithm VHDL implementation, but I need high-rate PCI transfers. |
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PCI transfer rate
by Unknown on Jan 28, 2004 |
Not available! | ||
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Hi!
Maximum theoretical bandwidth of PCI bus at 32 bit, 33 MHz is arround
130MBps, so I doubt that you can find any device supporting that kind of
throughput. I tested burst transfers with spartan_drv.c.
You must use spartan_write routine with appropriate size of transfer.
I think the best size would be a multiple of cache line size in your
machine.
The routine is not copying word by word, it uses memcpy_toio call with
the size in bytes you specify. (do you have the latest version from the
CVS?)
Hope this helps,
Miha Dolenc
On 1/28/2004, "stef@mat.uni.torun.pl" stef@mat.uni.torun.pl> wrote:
Hello,
Is it possible to achieve high transfer rates (120 MBytes/s) using
Opencore PCI?
I have succesfully implemented test application in Memec Spartan 2
Board (rev.2), but transfer rates using write(SPARTAN_FD, buf,
buf_size) does not exceed about 1.5 MByte/s.
This write() function for large buf_size parameter is implemented in
spartan_drv.c by sending 32 bit word by word .
To sum up : Is it possible to initiate 0 wait state burst tranfer?
I would be gratefull for response,
stef
PS. I plan to release to OPENCORES my Smith-Waterman algorithm VHDL
implementation, but I need high-rate PCI transfers.
_______________________________________________
http://www.opencores.org/mailman/listinfo/pci
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