Hi, I am new to opencores, pci bridge and verilog. I would like to synthesize and implement CRT application and run tests on Inside board with Spartan2 (xc2s150-pq208-5 chip). I am not sure how to setup the project and what tools to use. Is webpack 6.1 (current free version) suitable for this task? I understand that synthesis and implementation is working with version webpack 4.52 and files are no longer up to date for webpack 6.1. Unfortunately I do not have 4.52. Is here anything that I can do to update files? Any information would be greatly appreciated! Regards, Richard -------------- next part -------------- An HTML attachment was scrubbed... URL: http://www.opencores.org/forums/pci/attachments/20040206/41f6ad4b/attachment.htm