Hi all,
I'm using altera's fpga to implement a slave pci interface.Does it matters if i don't use the following signals:
GNT# REQ# STOP# LOCK# PERR# SERR# PAR#
Thanks for your advice!


liqiyue

liqiyue,
You should be able to create a PCI target,
Without using:

GNT#, REQ#, only used by initiator to request bus

LOCK#, used by initiator to form atomic operation

PERR#, SERR# used to report errors, if you have an error
You will have to live with it.

But you will have to implement

STOP# this is how the target requests the master
To stop the current transaction.

PAR The target must drive PAR for read data phases.
Parity is even across AD and C/BE lines, and
held valid for one clock after the last data
Transfer phase.


David

Good Luck