-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1 I have a video transmitter design that really wants to move data at high rates. I want to read from the PCI bus by doing burst reads from the WB side to the wb_pci slave interface. In this case I do indeed get burst reads to the PCI side, but the wb master (requesting the read) is being retried until the entire burst is complete. What I think should happen is that the PCI side should read enough to get a head start in the internal fifos, then start satisfying requests on the WB side. But what I am instead seeing is the wb is retried until the PCI burst read terminates. I'm configuring the registers like this: ~ W_IMG_CTRL1: 0x00000003 ~ W_BA1 : 0x00000000 ~ W_AM1 : 0x80000000 ~ W_TA1 : 0x00000000 ~ W_IMG_CTRL2: 0x00000003 ~ W_BA2 : 0x80000000 ~ W_AM2 : 0x80000000 ~ W_TA2 : 0x00000000 The documentation suggests that reads to the wb_pci slave should start being satisfied as long as there is data in the fifo, but that kind of statement could be interpreted a few different ways. So m question becomes, how to I get the PCI bridge to read several megabytes of data from 4K scattered pages at on the order of 80 MBytes/sec? I should be able to get that sort of read rate out of a PCI bus master. - -- Steve Williams "The woods are lovely, dark and deep. steve at icarus.com But I have promises to keep, http://www.icarus.com and lines to code before I sleep, http://www.picturel.com And lines to code before I sleep." -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.0.7 (GNU/Linux) Comment: Using GnuPG with Mozilla - http://enigmail.mozdev.org iD8DBQFBRQ8drPt1Sc2b3ikRAky3AJwIhCQ+5pmL78n7wnSPigRzz5UaeACgjmgo NCTND8TgO7HEC4CxEzu8mEc= =IO3a -----END PGP SIGNATURE----- _______________________________________________ http://www.opencores.org/mailman/listinfo/pci