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implementing pci master device in fpga
by Unknown on Sep 15, 2004 |
Not available! | ||
Hello there...
I'm doing a study project in which a pci master device is to be implemented in a fpga such as the Altera Cyclone via VHDL. Can anybody give me some guidelines. I am quite familiar with the pci bus but have trouble to construct the state machine. As an additional information: there should be only the pci bus master (the fpga) and one pci target device (for example an ethernet card) communicating, so no arbitration is needed. I would be very pleased bout any kind of advise. Perhaps anyone could even provide me some VHDL-codelines. Thank You Christoph |
implementing pci master device in fpga
by AustinFranklin on Sep 17, 2004 |
AustinFranklin
Posts: 17 Joined: Sep 12, 2008 Last seen: Jan 26, 2021 |
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Hi Christoph,
I'm doing a study project in which a pci master device is to be
implemented in a fpga such as the Altera Cyclone via VHDL. Can anybody give me some guidelines. I am quite familiar with the pci bus but have trouble to construct the state machine. Get a copy of the PCI spec, it has the statemachines explicitly outlined in it. Also, there is a very good PCI book out, I believe from Annabooks...I don't remember the name of it.
As an additional information:
there should be only the pci bus master (the fpga) and one pci target device (for example an ethernet card) communicating, so no arbitration is needed. Correct. Regards, Austin |
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