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communicating with pci-target
by Unknown on Oct 13, 2004 |
Not available! | ||
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I'm working on a study project wherein a pci master (a fpga) should
communicate with a pci target (e.g. a network card).
Now i want to establish a simple communication, but only on the
hardware layer, not in a pc environment.
Therefore I have constructed a pci master state machine with vhdl and
I now want to read out (for whatever reason) the target's Configuration
Space.
The master state machine (in the fpga) resets the target and accesses
it via Configuration Read command.
----------------------------------------
Now my question: Does anybody know where the > of the pci target device starts?
----------------------------------------
Just for clarification, I don't want to access the target via the
Configuration Address Port on address 0CF8h, I'm not working in a PC
environment, just on a circuit board.
Thank You in advance for Your help, Chris
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communicating with pci-target
by Unknown on Oct 13, 2004 |
Not available! | ||
|
To read configuration space you use signal IDSEL as a chip select, IDSEL is
connected to one of the high AD lines, the PCI command on C/BE[3..0] would
be CONFIGURATION READ (hex A).
Your circuit will have the connected an AD line to the network cards IDSEL
line. That sets the address of the configuration space.
----- Original Message -----
From: xxxkryzxxx@web.de>
To: pci@opencores.org>
Sent: Wednesday, October 13, 2004 7:17 AM
Subject: [pci] communicating with pci-target
I'm working on a study project wherein a pci master (a fpga) should
communicate with a pci target (e.g. a network card).
Now i want to establish a simple communication, but only on the
hardware layer, not in a pc environment.
Therefore I have constructed a pci master state machine with vhdl and
I now want to read out (for whatever reason) the target's Configuration
Space.
The master state machine (in the fpga) resets the target and accesses
it via Configuration Read command.
----------------------------------------
Now my question: Does anybody know where the > of the pci target device starts?
----------------------------------------
Just for clarification, I don't want to access the target via the
Configuration Address Port on address 0CF8h, I'm not working in a PC
environment, just on a circuit board.
Thank You in advance for Your help, Chris
_______________________________________________
http://www.opencores.org/mailman/listinfo/pci
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communicating with pci-target
by Unknown on Oct 13, 2004 |
Not available! | ||
|
Hi Chris,
Incase you have just one master and one target each sitting in a pci slot in the board. For any configuration through pci, the address starts from 0. The first 16 double words are mandatory for any pci target. So you can give from address 0(make sure the least 2 significant bit is always 0) thru 15. Make sure you drive a 1 in any one of the remaining admux lines, and connect it to the idsel of the target board. This informs the target card that it is the destination for this particular configuration read/write command, and it responds. All the best. Regards, Ravi Rajaraman
From: "Dave Warren" dave@luscher.co.uk>
Reply-To: "Discussion list about free,open source PCI IP core"
pci@opencores.org>
To: "Discussion list about free,open source PCI IP core"
pci@opencores.org>
Subject: Re: [pci] communicating with pci-target
Date: Wed, 13 Oct 2004 09:37:53 +0100
To read configuration space you use signal IDSEL as a chip select, IDSEL is
connected to one of the high AD lines, the PCI command on C/BE[3..0] would
be CONFIGURATION READ (hex A).
Your circuit will have the connected an AD line to the network cards IDSEL
line. That sets the address of the configuration space.
----- Original Message -----
From: xxxkryzxxx@web.de>
To: pci@opencores.org>
Sent: Wednesday, October 13, 2004 7:17 AM
Subject: [pci] communicating with pci-target
_________________________________________________________________
Movies, music, celeb news. Stay in the loop. http://www.msn.co.in/cinema/
With MSN Entertainment!
> I'm working on a study project wherein a pci master (a fpga) should
> communicate with a pci target (e.g. a network card).
> Now i want to establish a simple communication, but only on the
> hardware layer, not in a pc environment.
> Therefore I have constructed a pci master state machine with vhdl and
> I now want to read out (for whatever reason) the target's Configuration
> Space.
> The master state machine (in the fpga) resets the target and accesses
> it via Configuration Read command.
> ----------------------------------------
> Now my question: Does anybody know where the space>> of the pci target device starts?
> ----------------------------------------
> Just for clarification, I don't want to access the target via the
> Configuration Address Port on address 0CF8h, I'm not working in a PC
> environment, just on a circuit board.
> Thank You in advance for Your help, Chris
> _______________________________________________
> http://www.opencores.org/mailman/listinfo/pci
>
_______________________________________________
http://www.opencores.org/mailman/listinfo/pci
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