Hello, I am working on a project with PCI. I will have an evaluation 32-bit PCI core and an FPGA Avnet board. I have no experience in PCI. I will program the FPGA in VHDL. I would like to have some book/link which described what happen in the hardware side: -the BAR configuration : is it possible to map 2 fifo for example in the same BAR ? -Address decoding: How does the data can find a fifo map in BAR 0 ? I was already on the xilinx support website,but I have found some information, but it was not enough for beginner. Thanks Assenjee Vous manquez d’espace pour stocker vos mails ? Yahoo! Mail vous offre GRATUITEMENT 100 Mo ! Créez votre Yahoo! Mail sur http://fr.benefits.yahoo.com/ Le nouveau Yahoo! Messenger est arrivé ! Découvrez toutes les nouveautés pour dialoguer instantanément avec vos amis. A télécharger gratuitement sur http://fr.messenger.yahoo.com