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no use no use 1/1 no use no use
PCI Bridge Error
by Unknown on Jul 13, 2005
Not available!
Hi,

I am trying to synthesize the PCI Bridge in webpack 7.1 and I am
getting the following error:

ERROR:HDLCompilers:26 - "/../Documents and
Settings/OpenCores/OpenCores/pci/rtl/verilog/pci_conf_space.v" line
1784 Macro reference `PCI_AT_EN1 is not defined
ERROR: XST failed

Any help in how to define that? Thanks in advance

Regards,
Jorge
PCI Bridge Error
by Unknown on Jul 13, 2005
Not available!
you have to use the software provided by opencore to generate the configuration file. --Alvin On 7/13/05, jtrabal at engin.umass.edu jtrabal at engin.umass.edu> wrote:
Hi, I am trying to synthesize the PCI Bridge in webpack 7.1 and I am getting the following error: ERROR:HDLCompilers:26 - "/../Documents and Settings/OpenCores/OpenCores/pci/rtl/verilog/pci_conf_space.v" line 1784 Macro reference `PCI_AT_EN1 is not defined ERROR: XST failed Any help in how to define that? Thanks in advance Regards, Jorge _______________________________________________ http://www.opencores.org/mailman/listinfo/pci


PCI Bridge Error
by Unknown on Jul 14, 2005
Not available!
Hi Alvin, I've found the PCI bridge's configurator tool produced an invalid pci_conf_space.v for me. I had to spend a considerable amount of time understanding what the constants did and fixing them correctly. One really annoying problem was that the PCI_AMx constants were created by Cofigurator as a 20-bit constant, when it should have been 24-bits! Where is the sourcecode for the Configurator tool? Cheers, Joseph Tan -----Original Message----- From: pci-bounces at opencores.org [mailto:pci-bounces at opencores.org]On Behalf Of alvin tran Sent: Thursday, 14 July 2005 5:06 AM To: Discussion list about free, open source PCI IP core Subject: Re: [pci] PCI Bridge Error you have to use the software provided by opencore to generate the configuration file. --Alvin On 7/13/05, jtrabal at engin.umass.edu jtrabal at engin.umass.edu> wrote:
Hi, I am trying to synthesize the PCI Bridge in webpack 7.1 and I am getting the following error: ERROR:HDLCompilers:26 - "/../Documents and Settings/OpenCores/OpenCores/pci/rtl/verilog/pci_conf_space.v" line 1784 Macro reference `PCI_AT_EN1 is not defined ERROR: XST failed Any help in how to define that? Thanks in advance Regards, Jorge _______________________________________________ http://www.opencores.org/mailman/listinfo/pci
_______________________________________________ http://www.opencores.org/mailman/listinfo/pci
PCI Bridge Error
by Unknown on Jul 14, 2005
Not available!
jtrabal at engin.umass.edu wrote:
I am trying to synthesize the PCI Bridge in webpack 7.1 and I am
getting the following error:

ERROR:HDLCompilers:26 - "/../Documents and
Settings/OpenCores/OpenCores/pci/rtl/verilog/pci_conf_space.v" line
1784 Macro reference `PCI_AT_EN1 is not defined
ERROR: XST failed

Any help in how to define that? Thanks in advance
That define is to enable address translation for PCI image 1. This is defined in pci_user_constants.v and should be included in pci_constants.v (as long as REGRESSION is not defined). Regards, -- Mark McDougall, Software Engineer Virtual Logic Pty Ltd, http://www.vl.com.au> 21-25 King St, Rockdale, 2216 Ph: +612-9599-3255 Fax: +612-9599-3266
PCI Bridge Error
by Unknown on Jul 14, 2005
Not available!
TAN Joseph wrote:

I've found the PCI bridge's configurator tool produced an invalid
pci_conf_space.v for me. I had to spend a considerable amount of time
understanding what the constants did and fixing them correctly. One
really annoying problem was that the PCI_AMx constants were created
by Cofigurator as a 20-bit constant, when it should have been
24-bits!

Where is the sourcecode for the Configurator tool?
I guess I'm lucky that I didn't even know such a tool existed - I've been configuring 'by hand' since day 1. I guess you also get to learn a little bit more this way??? Regards, -- Mark McDougall, Software Engineer Virtual Logic Pty Ltd, http://www.vl.com.au> 21-25 King St, Rockdale, 2216 Ph: +612-9599-3255 Fax: +612-9599-3266
PCI Bridge Error
by Unknown on Jul 14, 2005
Not available!
Hi Mark, Certainly I learnt more, and everything looks great now. Honestly, you'd expect the software support tool to actually work. I can't even find the sourcecode for this tool to fix it. Some of the 'defines were not valid numbers. For example: `define PCI_AT_EN0 20'hN_ 20-bits used to enable Address Translation? What does "N_" mean? Cheers, Joseph Tan -----Original Message----- From: pci-bounces at opencores.org [mailto:pci-bounces at opencores.org]On Behalf Of Mark McDougall Sent: Thursday, 14 July 2005 9:32 AM To: Discussion list about free, open source PCI IP core Subject: Re: [pci] PCI Bridge Error I guess I'm lucky that I didn't even know such a tool existed - I've been configuring 'by hand' since day 1. I guess you also get to learn a little bit more this way??? Regards, -- Mark McDougall, Software Engineer Virtual Logic Pty Ltd, http://www.vl.com.au> 21-25 King St, Rockdale, 2216 Ph: +612-9599-3255 Fax: +612-9599-3266 _______________________________________________ http://www.opencores.org/mailman/listinfo/pci
PCI Bridge Error
by Unknown on Jul 14, 2005
Not available!
TAN Joseph wrote:

Honestly, you'd expect the software support tool to actually work. I
can't even find the sourcecode for this tool to fix it. Some of the
'defines were not valid numbers.


Heh, well, at the risk of biting the hand that feeds me, I've learnt not
to expect anything more than what you can download from the website. I'm
currently using the PCI core, DMA core, OCIDE core and the 16550 core
and I've come across a few problems which I've had to resolve myself
after queries go unanswered.

Mind you, I'm not complaining - I understand people provide these as-is
and then move on to other things and don't have time to support them.

For example: `define PCI_AT_EN0 20'hN_ 20-bits used to enable Address
Translation? What does "N_" mean?
No idea. I suspect it's a typo in the tool source. Wonder what the tool was written in? Regards, -- Mark McDougall, Software Engineer Virtual Logic Pty Ltd, http://www.vl.com.au> 21-25 King St, Rockdale, 2216 Ph: +612-9599-3255 Fax: +612-9599-3266
PCI Bridge Error
by Unknown on Jul 14, 2005
Not available!
Hi Mark, Well at least the PCI core itself looks OK. I haven't found any actual bugs in the Verilog code once I got everything working. The actual Verilog source code looks very low-level and not easily maintainable. How difficult would it be to extend the design for 64-bit PCI and 64-bit WishBone bus? Cheers, Joseph Tan -----Original Message----- From: pci-bounces at opencores.org [mailto:pci-bounces at opencores.org]On Behalf Of Mark McDougall Sent: Thursday, 14 July 2005 10:30 AM To: Discussion list about free, open source PCI IP core Subject: Re: [pci] PCI Bridge Error TAN Joseph wrote:
Honestly, you'd expect the software support tool to actually work. I
can't even find the sourcecode for this tool to fix it. Some of the
'defines were not valid numbers.


Heh, well, at the risk of biting the hand that feeds me, I've learnt not
to expect anything more than what you can download from the website. I'm
currently using the PCI core, DMA core, OCIDE core and the 16550 core
and I've come across a few problems which I've had to resolve myself
after queries go unanswered.

Mind you, I'm not complaining - I understand people provide these as-is
and then move on to other things and don't have time to support them.

For example: `define PCI_AT_EN0 20'hN_ 20-bits used to enable Address
Translation? What does "N_" mean?
No idea. I suspect it's a typo in the tool source. Wonder what the tool was written in? Regards, -- Mark McDougall, Software Engineer Virtual Logic Pty Ltd, http://www.vl.com.au> 21-25 King St, Rockdale, 2216 Ph: +612-9599-3255 Fax: +612-9599-3266 _______________________________________________ http://www.opencores.org/mailman/listinfo/pci
PCI Bridge Error
by Unknown on Jul 14, 2005
Not available!
TAN Joseph wrote:

Well at least the PCI core itself looks OK. I haven't found any
actual bugs in the Verilog code once I got everything working.


Yeah, that's looking pretty solid this end too. A few problems with the
IDE core mostly, and some struggling with understanding the DMA
pass-thru limitations mainly.

The actual Verilog source code looks very low-level and not easily
maintainable. How difficult would it be to extend the design for
64-bit PCI and 64-bit WishBone bus?
To be honest, I haven't really looked inside the PCI core, mainly due to the fact that it appears to work without any problems - and I've had my fingers very firmly crossed all this time! ;) Rather, we've spent quite a bit of time trying to turn the PCI testbench software into something that we can use for arbitrary PCI transactions in a system testbench - with some limited success. Now *that* is a task in itself - though to be fair the testbench is really geared towards doing what it was originally intended - a series of 'pre-canned' tests - and for that it is remarkably thorough. Sorry I can't help with the mods. Regards, -- Mark McDougall, Software Engineer Virtual Logic Pty Ltd, http://www.vl.com.au> 21-25 King St, Rockdale, 2216 Ph: +612-9599-3255 Fax: +612-9599-3266
PCI Bridge Error
by Unknown on Jul 14, 2005
Not available!
The configuration tool was a contribution from one of the users of PCI core, unfortunately he never provided the source code. It is best to manually configure the PCI core, documentation about the core is quite extensive. There will be a commercial support available from Bitstream Semiconductor, along with the commercial license that will allow modifications to the core to those companies that do not wish to be limited by GPL type license. regards Damjan ----- Original Message ----- From: "TAN Joseph" Joseph.TAN at Tenix.com> To: "alvin tran" alvin.h.tran at gmail.com>; "Discussion list about free, open source PCI IP core" pci at opencores.org> Sent: Thursday, July 14, 2005 1:46 AM Subject: RE: [pci] PCI Bridge Error Hi Alvin, I've found the PCI bridge's configurator tool produced an invalid pci_conf_space.v for me. I had to spend a considerable amount of time understanding what the constants did and fixing them correctly. One really annoying problem was that the PCI_AMx constants were created by Cofigurator as a 20-bit constant, when it should have been 24-bits! Where is the sourcecode for the Configurator tool? Cheers, Joseph Tan -----Original Message----- From: pci-bounces at opencores.org [mailto:pci-bounces at opencores.org]On Behalf Of alvin tran Sent: Thursday, 14 July 2005 5:06 AM To: Discussion list about free, open source PCI IP core Subject: Re: [pci] PCI Bridge Error you have to use the software provided by opencore to generate the configuration file. --Alvin On 7/13/05, jtrabal at engin.umass.edu jtrabal at engin.umass.edu> wrote:
Hi, I am trying to synthesize the PCI Bridge in webpack 7.1 and I am getting the following error: ERROR:HDLCompilers:26 - "/../Documents and Settings/OpenCores/OpenCores/pci/rtl/verilog/pci_conf_space.v" line 1784 Macro reference `PCI_AT_EN1 is not defined ERROR: XST failed Any help in how to define that? Thanks in advance Regards, Jorge _______________________________________________ http://www.opencores.org/mailman/listinfo/pci
_______________________________________________ http://www.opencores.org/mailman/listinfo/pci _______________________________________________ http://www.opencores.org/mailman/listinfo/pci
PCI Bridge Error
by Unknown on Jul 14, 2005
Not available!
Hi, Thanks for your reply. How can I use the configuration utility for the PCi Bridge? I am trying to open that in Windows XP, but I can't. Thank you for the help. Jorge Trabal ----- Original Message ----- From: alvin tranalvin.h.tran at g...> To: Date: Wed Jul 13 21:35:43 CEST 2005 Subject: [pci] PCI Bridge Error
you have to use the software provided by opencore to generate the configuration file. --Alvin On 7/13/05, jtrabal at engin.umass.edu wrote:
> Hi,
>
> I am trying to synthesize the PCI Bridge in webpack 7.1 and I

am
> getting the following error:
>
> ERROR:HDLCompilers:26 - "/../Documents and
>

Settings/OpenCores/OpenCores/pci/rtl/verilog/pci_conf_space.v"
line
> 1784 Macro reference `PCI_AT_EN1 is not defined > ERROR: XST failed > > Any help in how to define that? Thanks in advance > > Regards, > Jorge > _______________________________________________ > http://www.opencores.org/mailman/listinfo/pci >




PCI Bridge Error
by Unknown on Jul 14, 2005
Not available!
Hi, I am trying to implement the PCI Core in the MEMEC 2s200 Spartan II board and I am a little confused in terms of the process and what I really need from the PCI folder to implement the design. Please I need help. Thanks in advance. Regards, Jorge ----- Original Message ----- From: TAN JosephJoseph.TAN at T...> To: Date: Thu Jul 14 04:03:46 CEST 2005 Subject: [pci] PCI Bridge Error
Hi Mark,

Well at least the PCI core itself looks OK. I haven't found any
actual bugs in the Verilog code once I got everything working.

The actual Verilog source code looks very low-level and not easily
maintainable. How difficult would it be to extend the design for
64-bit PCI and 64-bit WishBone bus?

Cheers,
Joseph Tan
-----Original Message-----
From: pci-bounces at opencores.org [mailto:pci-bounces at
opencores.org]On
Behalf Of Mark McDougall
Sent: Thursday, 14 July 2005 10:30 AM
To: Discussion list about free, open source PCI IP core
Subject: Re: [pci] PCI Bridge Error
TAN Joseph wrote:
> Honestly, you'd expect the software support tool to actually

work. I
> can't even find the sourcecode for this tool to fix it. Some

of the
> 'defines were not valid numbers.

Heh, well, at the risk of biting the hand that feeds me, I've
learnt not
to expect anything more than what you can download from the
website. I'm
currently using the PCI core, DMA core, OCIDE core and the 16550
core
and I've come across a few problems which I've had to resolve
myself
after queries go unanswered.
Mind you, I'm not complaining - I understand people provide these
as-is
and then move on to other things and don't have time to support
them.
> For example: `define PCI_AT_EN0 20'hN_ 20-bits used to enable

Address
> Translation? What does "N_" mean?
No idea. I suspect it's a typo in the tool source. Wonder what the tool was written in? Regards, -- Mark McDougall, Software Engineer Virtual Logic Pty Ltd, http://www.vl.com.au> 21-25 King St, Rockdale, 2216 Ph: +612-9599-3255 Fax: +612-9599-3266 _______________________________________________ http://www.opencores.org/mailman/listinfo/pci


PCI Bridge Error
by Unknown on Jul 15, 2005
Not available!
Hi Jorge, To get started the register transfer level (RTL) code is located in \pci\rtl\verilog. The top level is "pci_bridge32.v". The PDF documentation describes the core in a lot of detail. Essentially you'll have to decide what your PCI device is going to do, appropriately configure the PCI bridge's constants, and then design your WishBone peripheral to talk to the PCI core. In \pci\sw\configurator there is a configurator utility to help you get started with setting the PCI bridge's constants. This utility is very buggy so don't trust its output. However, it can help new users understand what all those 'defines do. Consult the specification and Design Documentation for more detailed information. Cheers, Joseph Tan -----Original Message----- From: pci-bounces at opencores.org [mailto:pci-bounces at opencores.org]On Behalf Of jtrabal at engin.umass.edu Sent: Friday, 15 July 2005 3:41 AM To: alvin.h.tran at gmail.com; pci at opencores.org Subject: Re: [pci] PCI Bridge Error Hi, Thanks for your reply. How can I use the configuration utility for the PCi Bridge? I am trying to open that in Windows XP, but I can't. Thank you for the help. Jorge Trabal ----- Original Message ----- From: alvin tranalvin.h.tran at g...> To: Date: Wed Jul 13 21:35:43 CEST 2005 Subject: [pci] PCI Bridge Error
you have to use the software provided by opencore to generate the configuration file. --Alvin On 7/13/05, jtrabal at engin.umass.edu wrote:
> Hi,
>
> I am trying to synthesize the PCI Bridge in webpack 7.1 and I

am
> getting the following error:
>
> ERROR:HDLCompilers:26 - "/../Documents and
>

Settings/OpenCores/OpenCores/pci/rtl/verilog/pci_conf_space.v"
line
> 1784 Macro reference `PCI_AT_EN1 is not defined > ERROR: XST failed > > Any help in how to define that? Thanks in advance > > Regards, > Jorge > _______________________________________________ > http://www.opencores.org/mailman/listinfo/pci >


_______________________________________________ http://www.opencores.org/mailman/listinfo/pci
PCI Bridge Error
by Unknown on Jul 15, 2005
Not available!
Hi, When I synthesize I am getting this warning: Number of bonded IOBs: 365 out of 288 126% (*) Does anyone know why? Regards, Jorge ----- Original Message ----- From: TAN JosephJoseph.TAN at T...> To: Date: Fri Jul 15 04:25:22 CEST 2005 Subject: [pci] PCI Bridge Error
Hi Jorge, To get started the register transfer level (RTL) code is located in \pci\rtl\verilog. The top level is "pci_bridge32.v". The PDF documentation describes the core in a lot of detail. Essentially you'll have to decide what your PCI device is going to do, appropriately configure the PCI bridge's constants, and then design your WishBone peripheral to talk to the PCI core. In \pci\sw\configurator there is a configurator utility to help you get started with setting the PCI bridge's constants. This utility is very buggy so don't trust its output. However, it can help new users understand what all those 'defines do. Consult the specification and Design Documentation for more detailed information. Cheers, Joseph Tan -----Original Message----- From: pci-bounces at opencores.org [mailto:pci-bounces at opencores.org]On Behalf Of jtrabal at engin.umass.edu Sent: Friday, 15 July 2005 3:41 AM To: alvin.h.tran at gmail.com; pci at opencores.org Subject: Re: [pci] PCI Bridge Error Hi, Thanks for your reply. How can I use the configuration utility for the PCi Bridge? I am trying to open that in Windows XP, but I can't. Thank you for the help. Jorge Trabal ----- Original Message ----- From: alvin tran To: Date: Wed Jul 13 21:35:43 CEST 2005 Subject: [pci] PCI Bridge Error
> you have to use the software provided by opencore to generate

the
> configuration file. > --Alvin > On 7/13/05, jtrabal at engin.umass.edu engin.umass.edu> wrote:
> Hi,
>
> I am trying to synthesize the PCI Bridge in webpack 7.1

and I
> am
> getting the following error:
>
> ERROR:HDLCompilers:26 - "/../Documents and
>

>

Settings/OpenCores/OpenCores/pci/rtl/verilog/pci_conf_space.v"
> line
> 1784 Macro reference `PCI_AT_EN1 is not defined > ERROR: XST failed > > Any help in how to define that? Thanks in advance > > Regards, > Jorge > _______________________________________________ > http://www.opencores.org/mailman/listinfo/pci >

>
>
_______________________________________________ http://www.opencores.org/mailman/listinfo/pci


PCI Bridge Error
by Unknown on Jul 15, 2005
Not available!
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