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Re: Pci Digest, Vol 18, Issue 1
by Unknown on Jul 15, 2005 		Not available!
Hi Team Kindly can some one help in understanding the pci BAR Address mechanism. My ? is: Pls let me know how cpu or host will know that i need 2 mb space or 1 mb by reading the Memory or IO bar ...what is the decoding mechanism involved. Thanks & Regards Velu.V On 7/14/05, pci-request at opencores.org pci-request at opencores.org> wrote:
Send Pci mailing list submissions to pci at opencores.org To subscribe or unsubscribe via the World Wide Web, visit http://www.opencores.org/mailman/listinfo/pci or, via email, send a message with subject or body 'help' to pci-request at opencores.org You can reach the person managing the list at pci-owner at opencores.org When replying, please edit your Subject line so it is more specific than "Re: Contents of Pci digest..." Today's Topics: 1. PCI Bridge Error (jtrabal at engin.umass.edu) 2. Re: PCI Bridge Error (alvin tran) 3. Re: Trying to build CRT example with webpack 5.1 and the Memec 2S200 Board (jtrabal at engin.umass.edu) 4. RE: PCI Bridge Error (TAN Joseph) 5. Re: PCI Bridge Error (Mark McDougall) 6. Re: PCI Bridge Error (Mark McDougall) 7. RE: PCI Bridge Error (TAN Joseph) 8. Re: PCI Bridge Error (Mark McDougall) 9. RE: PCI Bridge Error (TAN Joseph) ---------------------------------------------------------------------- Message: 1 Date: Wed, 13 Jul 2005 19:41:57 +0200 (CEST) From: jtrabal at engin.umass.edu Subject: [pci] PCI Bridge Error To: pci at opencores.org Message-ID: 20050713174157.40DDE4C2A8 at www.opencores.org> Hi, I am trying to synthesize the PCI Bridge in webpack 7.1 and I am getting the following error: ERROR:HDLCompilers:26 - "/../Documents and Settings/OpenCores/OpenCores/pci/rtl/verilog/pci_conf_space.v" line 1784 Macro reference `PCI_AT_EN1 is not defined ERROR: XST failed Any help in how to define that? Thanks in advance Regards, Jorge ------------------------------ Message: 2 Date: Wed, 13 Jul 2005 12:35:43 -0700 From: alvin tran alvin.h.tran at gmail.com> Subject: Re: [pci] PCI Bridge Error To: "Discussion list about free, open source PCI IP core" pci at opencores.org> Message-ID: 5335dfc0050713123550e227a5 at mail.gmail.com> Content-Type: text/plain; charset=ISO-8859-1 you have to use the software provided by opencore to generate the configuration file. --Alvin On 7/13/05, jtrabal at engin.umass.edu jtrabal at engin.umass.edu> wrote:
> Hi, > > I am trying to synthesize the PCI Bridge in webpack 7.1 and I am > getting the following error: > > ERROR:HDLCompilers:26 - "/../Documents and > Settings/OpenCores/OpenCores/pci/rtl/verilog/pci_conf_space.v" line > 1784 Macro reference `PCI_AT_EN1 is not defined > ERROR: XST failed > > Any help in how to define that? Thanks in advance > > Regards, > Jorge > _______________________________________________ > http://www.opencores.org/mailman/listinfo/pci >
------------------------------ Message: 3 Date: Wed, 13 Jul 2005 22:23:00 +0200 (CEST) From: jtrabal at engin.umass.edu Subject: Re: [pci] Trying to build CRT example with webpack 5.1 and the Memec 2S200 Board To: pci at opencores.org Message-ID: 20050713202300.A164E4C2A9 at www.opencores.org> Hi, I am also trying to implement the CRT example with webpack 7.1 using the MEMEC 2S200 Board . Does anyone has the .UCF file for that board? Thanks for your help. Jorge ----- Original Message ----- From: yhy34 at 126.comyhy34 at 1...> To: Date: Tue Apr 5 15:28:51 CEST 2005 Subject: [pci] Trying to build CRT example with webpack 5.1 and the Memec 2S200 Board
> ----- Original Message ----- > From: Uwe Bonnes bon at e...> > To: pci at o... > Date: Tue, 28 Jan 2003 17:14:38 +0100 > Subject: Re: [pci] Trying to build CRT example with webpack 5.1 and > the Memec 2S200 Board
>
>
>>> "Miha" == Miha Dolenc
> mihad at o...> writes: > > Miha> Hello! I don't know a lot about WebPack software, so > I can't help > Miha> you there. The crt application is not VGA compatible, > that is why > Miha> computer will beep, even when the card is detected. > We used > Miha> special frame buffer driver for linux, to be able to > display X > Miha> Windows using the card. The thing I don't understand > is why the > Miha> card is not detected. Can you run "/sbin/lspci

> -v"
> when linux
> Miha> boots and check if the card is detected by linux?
>
> The test I reported where done on a plain motherboard, without

> any
> bootable
> medium. I only looked whether the card was recognized in the

> bios.
> Now I
> plugged in the card into my normal PC (with my normal APG

> cards as
> first
> video card) and it booted. Again, the card was not reported by

> the
> bios, but
> lspci reports:
> 00:0d.0 Bridge: Unknown device 2321:0001 (rev 01)
>
> I could also insmod spartan_fb.o after recompiling, and after
> "modprobe
> fbcon-mac" . The kernel reports:
> vesafb: framebuffer at 0xcf80000, mapped to 0xccf80000, size

> 300k
> vesafb: mode is 640x480x8, linelength=640
> vesafb: scrolling: redraw
> Console: switching to colour frame buffer device 80x30
> fb0: VESA VGA 1 frame buffer device
> fb0: VESA VGA 1 frame buffer device
>
> However I can't test with a monitor yet, as I placed the VGA
> connector on my
> plug-in Board in such a silly position, that I can't connect

> the
> cable. I
> have to think about an easy workaround and will report later.
>
> Regarding Webpack: You can download Webpack for free from the
> Xilinx
> site with a license for unlimited time and for recent devices

> with
> sensible
> size (e.g. up to XC2S300E). XST as synthesis tool is included.

> I
> think you use synplify as synthesis tool for openpci. I don't

> know
> of a
> Snyplify version free of costs and not time limited. So with
> webpack, only
> tools free of costs are involved in the toolchain (icarus,

> webpack,
> naxjp or
> impact from xilinx). So I guess, people will appreciate

> support
> for webpack in openpci. Download is about 160MByte, and the
> diskspace
> installed is about 550 MByte. If you decide to test webpack,

> let me
> know if
> you need help.
>
> I would also like to upload at least the ucf file modified for

> the
> Memec
> Spartan200 board. Obviously the Eagle design file for the plug

> in
> board are
> not yet ready to use without modification, but at least they

> define
> the > connectors and more. > > Bye > -- > Uwe Bonnes bon at e... > > Institut fuer Kernphysik Schlossgartenstrasse 9 64289

> Darmstadt
> --------- Tel. 06151 162516 -------- Fax. 06151 164321

> ----------
>

>
>
------------------------------ Message: 4 Date: Thu, 14 Jul 2005 09:46:01 +1000 From: "TAN Joseph" Joseph.TAN at Tenix.com> Subject: RE: [pci] PCI Bridge Error To: "alvin tran" alvin.h.tran at gmail.com>, "Discussion list about free, open source PCI IP core" pci at opencores.org> Message-ID: 200507132346.j6DNk18U027019 at sprint2.tenix.com> Content-Type: text/plain; charset="iso-8859-1" Hi Alvin, I've found the PCI bridge's configurator tool produced an invalid pci_conf_space.v for me. I had to spend a considerable amount of time understanding what the constants did and fixing them correctly. One really annoying problem was that the PCI_AMx constants were created by Cofigurator as a 20-bit constant, when it should have been 24-bits! Where is the sourcecode for the Configurator tool? Cheers, Joseph Tan -----Original Message----- From: pci-bounces at opencores.org [mailto:pci-bounces at opencores.org]On Behalf Of alvin tran Sent: Thursday, 14 July 2005 5:06 AM To: Discussion list about free, open source PCI IP core Subject: Re: [pci] PCI Bridge Error you have to use the software provided by opencore to generate the configuration file. --Alvin On 7/13/05, jtrabal at engin.umass.edu jtrabal at engin.umass.edu> wrote:
> Hi, > > I am trying to synthesize the PCI Bridge in webpack 7.1 and I am > getting the following error: > > ERROR:HDLCompilers:26 - "/../Documents and > Settings/OpenCores/OpenCores/pci/rtl/verilog/pci_conf_space.v" line > 1784 Macro reference `PCI_AT_EN1 is not defined > ERROR: XST failed > > Any help in how to define that? Thanks in advance > > Regards, > Jorge > _______________________________________________ > http://www.opencores.org/mailman/listinfo/pci >
_______________________________________________ http://www.opencores.org/mailman/listinfo/pci ------------------------------ Message: 5 Date: Thu, 14 Jul 2005 09:49:48 +1000 From: "Mark McDougall" markm at vl.com.au> Subject: Re: [pci] PCI Bridge Error To: "Discussion list about free, open source PCI IP core" pci at opencores.org> Message-ID: 42D5A89C.3010500 at vl.com.au> Content-Type: text/plain; charset=ISO-8859-1; format=flowed jtrabal at engin.umass.edu wrote:
> I am trying to synthesize the PCI Bridge in webpack 7.1 and I am
> getting the following error:
>
> ERROR:HDLCompilers:26 - "/../Documents and
> Settings/OpenCores/OpenCores/pci/rtl/verilog/pci_conf_space.v" line
> 1784 Macro reference `PCI_AT_EN1 is not defined
> ERROR: XST failed
>
> Any help in how to define that? Thanks in advance
That define is to enable address translation for PCI image 1. This is defined in pci_user_constants.v and should be included in pci_constants.v (as long as REGRESSION is not defined). Regards, -- Mark McDougall, Software Engineer Virtual Logic Pty Ltd, http://www.vl.com.au> 21-25 King St, Rockdale, 2216 Ph: +612-9599-3255 Fax: +612-9599-3266 ------------------------------ Message: 6 Date: Thu, 14 Jul 2005 10:02:24 +1000 From: "Mark McDougall" markm at vl.com.au> Subject: Re: [pci] PCI Bridge Error To: "Discussion list about free, open source PCI IP core" pci at opencores.org> Message-ID: 42D5AB90.2050101 at vl.com.au> Content-Type: text/plain; charset=ISO-8859-1; format=flowed TAN Joseph wrote:
> I've found the PCI bridge's configurator tool produced an invalid
> pci_conf_space.v for me. I had to spend a considerable amount of time
> understanding what the constants did and fixing them correctly. One
> really annoying problem was that the PCI_AMx constants were created
> by Cofigurator as a 20-bit constant, when it should have been
> 24-bits!
>
> Where is the sourcecode for the Configurator tool?
I guess I'm lucky that I didn't even know such a tool existed - I've been configuring 'by hand' since day 1. I guess you also get to learn a little bit more this way??? Regards, -- Mark McDougall, Software Engineer Virtual Logic Pty Ltd, http://www.vl.com.au> 21-25 King St, Rockdale, 2216 Ph: +612-9599-3255 Fax: +612-9599-3266 ------------------------------ Message: 7 Date: Thu, 14 Jul 2005 10:06:09 +1000 From: "TAN Joseph" Joseph.TAN at Tenix.com> Subject: RE: [pci] PCI Bridge Error To: "Discussion list about free, open source PCI IP core" pci at opencores.org> Message-ID: 200507140006.j6E069pw003635 at sprint2.tenix.com> Content-Type: text/plain; charset="iso-8859-1" Hi Mark, Certainly I learnt more, and everything looks great now. Honestly, you'd expect the software support tool to actually work. I can't even find the sourcecode for this tool to fix it. Some of the 'defines were not valid numbers. For example: `define PCI_AT_EN0 20'hN_ 20-bits used to enable Address Translation? What does "N_" mean? Cheers, Joseph Tan -----Original Message----- From: pci-bounces at opencores.org [mailto:pci-bounces at opencores.org]On Behalf Of Mark McDougall Sent: Thursday, 14 July 2005 9:32 AM To: Discussion list about free, open source PCI IP core Subject: Re: [pci] PCI Bridge Error I guess I'm lucky that I didn't even know such a tool existed - I've been configuring 'by hand' since day 1. I guess you also get to learn a little bit more this way??? Regards, -- Mark McDougall, Software Engineer Virtual Logic Pty Ltd, http://www.vl.com.au> 21-25 King St, Rockdale, 2216 Ph: +612-9599-3255 Fax: +612-9599-3266 _______________________________________________ http://www.opencores.org/mailman/listinfo/pci ------------------------------ Message: 8 Date: Thu, 14 Jul 2005 11:00:16 +1000 From: "Mark McDougall" markm at vl.com.au> Subject: Re: [pci] PCI Bridge Error To: "Discussion list about free, open source PCI IP core" pci at opencores.org> Message-ID: 42D5B920.2050502 at vl.com.au> Content-Type: text/plain; charset=ISO-8859-1; format=flowed TAN Joseph wrote:
> Honestly, you'd expect the software support tool to actually work. I
> can't even find the sourcecode for this tool to fix it. Some of the
> 'defines were not valid numbers.


Heh, well, at the risk of biting the hand that feeds me, I've learnt not
to expect anything more than what you can download from the website. I'm
currently using the PCI core, DMA core, OCIDE core and the 16550 core
and I've come across a few problems which I've had to resolve myself
after queries go unanswered.

Mind you, I'm not complaining - I understand people provide these as-is
and then move on to other things and don't have time to support them.

> For example: `define PCI_AT_EN0 20'hN_ 20-bits used to enable Address
> Translation? What does "N_" mean?
No idea. I suspect it's a typo in the tool source. Wonder what the tool was written in? Regards, -- Mark McDougall, Software Engineer Virtual Logic Pty Ltd, http://www.vl.com.au> 21-25 King St, Rockdale, 2216 Ph: +612-9599-3255 Fax: +612-9599-3266 ------------------------------ Message: 9 Date: Thu, 14 Jul 2005 12:03:46 +1000 From: "TAN Joseph" Joseph.TAN at Tenix.com> Subject: RE: [pci] PCI Bridge Error To: "Discussion list about free, open source PCI IP core" pci at opencores.org> Message-ID: 200507140203.j6E23kh7024195 at sprint2.tenix.com> Content-Type: text/plain; charset="iso-8859-1" Hi Mark, Well at least the PCI core itself looks OK. I haven't found any actual bugs in the Verilog code once I got everything working. The actual Verilog source code looks very low-level and not easily maintainable. How difficult would it be to extend the design for 64-bit PCI and 64-bit WishBone bus? Cheers, Joseph Tan -----Original Message----- From: pci-bounces at opencores.org [mailto:pci-bounces at opencores.org]On Behalf Of Mark McDougall Sent: Thursday, 14 July 2005 10:30 AM To: Discussion list about free, open source PCI IP core Subject: Re: [pci] PCI Bridge Error TAN Joseph wrote:
> Honestly, you'd expect the software support tool to actually work. I
> can't even find the sourcecode for this tool to fix it. Some of the
> 'defines were not valid numbers.


Heh, well, at the risk of biting the hand that feeds me, I've learnt not
to expect anything more than what you can download from the website. I'm
currently using the PCI core, DMA core, OCIDE core and the 16550 core
and I've come across a few problems which I've had to resolve myself
after queries go unanswered.

Mind you, I'm not complaining - I understand people provide these as-is
and then move on to other things and don't have time to support them.

> For example: `define PCI_AT_EN0 20'hN_ 20-bits used to enable Address
> Translation? What does "N_" mean?
No idea. I suspect it's a typo in the tool source. Wonder what the tool was written in? Regards, -- Mark McDougall, Software Engineer Virtual Logic Pty Ltd, http://www.vl.com.au> 21-25 King St, Rockdale, 2216 Ph: +612-9599-3255 Fax: +612-9599-3266 _______________________________________________ http://www.opencores.org/mailman/listinfo/pci ------------------------------ _______________________________________________ Pci mailing list Pci at opencores.org http://www.opencores.org/mailman/listinfo/pci End of Pci Digest, Vol 18, Issue 1 **********************************


Re: Pci Digest, Vol 18, Issue 1
by Unknown on Jul 15, 2005 		Not available!
Velayutham Venkatachalapathy wrote:

Kindly can some one help in understanding the pci BAR Address
mechanism.

My ? is: Pls let me know how cpu or host will know that i need 2 mb
space or 1 mb by reading the Memory or IO bar ...what is the decoding
mechanism involved.
I'd strongly suggest you read Mindshare's "PCI System Architecture". The BAR register itself implements only the high-order address bits above your chosen image size. For example, a 2MB space requires only address bits 31:21 to be implemented to store a 2MB-aligned base address. Whatever software is doing the PCI configuration (eg BIOS) will firstly write "all-1's" to this register and read it back to determine which bits are implemented - and hence the size of the image. In the example above, after writing 1's it would read back $FFE00000. The size is calculated by negating, in this case $200000 = 2MB. Finally it re-writes the register with the real address it has assigned to the BAR, which must be "naturally aligned", in this case, aligned on a 2MB boundary. So in the opencores PCI core, you use the PCI_AMx define in pci_user_constants.v to set the mask to, in this case, $FFE0_00 for a 2MB BAR. Similarly, you'd use $FFF0_00 for a 1MB BAR. Regards, -- Mark McDougall, Software Engineer Virtual Logic Pty Ltd, http://www.vl.com.au> 21-25 King St, Rockdale, 2216 Ph: +612-9599-3255 Fax: +612-9599-3266
no use no use 1/1 no use no use
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