Hi, I'm a student and I have received a project where I must study and implement the PCI IP Core in combination with the Wishbone ConMax IP Core and a 3rd self designed Wishbone Core. They have also asked me to test the whole design in hardware. I'm intending to use a AvNET board with a Virtix4 to accomplish that. Every part of the design on the Wishbone Side is very clear to me, but can anyone give me advice how to (more) easily test the PCI side of the Core. Is it possible to connect the Core to a PC PCI-bus and to carry out simple Read/Write actions (single, burst, .) to Wishbone images or Configuration space ( Guest implementation is used ) and is there a driver available to do this (MS)? Or are there other, better ways to test such PCI design in hardware. Regards, Tom -------------- next part -------------- An HTML attachment was scrubbed... URL: http://www.opencores.org/forums.cgi/pci/attachments/20051103/b723e621/attachment.htm

Skynet wrote:

"Test ... in hardware"? You mean "verify" in hardware!?! Normally a design would be tested under simulation using a full testbench environment - in the case of PCI that involves models of PCI master and target units that can generate all the different PCI cycles. However, given the constraints (student project) I would suggest that you could consider the PCI core as "trusted" and as long as you sufficiently understand PCI and the core itself, you could risk a "crash and burn" exercise on real hardware. Yes, you can drop the OC PCI core etc into PCI eval board and plug it into a PC and do simple read/writes. I'd suggest you use CDBG http://www.probo.com/cdbg.htm> to exercise your hardware. No drivers or code to write, simple commands to read and write PCI space. If you want to get a bit more fancy, it has a built-in C interpreter that enables you to write test "drivers" of sorts. An *indispensible* tool for PCI development! Best used booting from floppy or even a harddisk configured to boot into DOS/CDBG - you *will* be reconfiguring the FPGA and rebooting frequently! Regards, -- Mark McDougall, Software Engineer Virtual Logic Pty Ltd, http://www.vl.com.au> 21-25 King St, Rockdale, 2216 Ph: +612-9599-3255 Fax: +612-9599-3266