Hi, I am trying to implement the PCI/Wishbone Core in a Memec Spartan II 2s200 PCI Board. In my wishbone side I am trying to implement the simple_gpio core that can be found under projects in Opencores. Everything synthesizes (with some warnings) and the computer shows up the bridge. For debugging purposes I am using CDBG under MS- DOS. In CDBG I get BAR0, BAR1 and BAR9, which is the right thing to get. But, my problem is that I cannot write to BAR1 to control the the simple_gpio registers in the wishbone side. No matter what value I try to put in BAR1 I always read hex "ffffffff". Does any one can help me with this? Another problem that I am having is that the design is not meeting time constraints. Please, if someone know how to solve this problem or problems, let me know. I will appreciate all your help. Thank you in advance. Regards, Jorge _______________________________________________ http://www.opencores.org/mailman/listinfo/pci