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how to use the PCI bridge IP core ?
by Unknown on Dec 6, 2005 |
Not available! | ||
Hello all,
I have a PCI board with an FPGA programmed with the PCI bridge from opencores. I would like set up a communication between the board and the computer.
From a PC running Linux I use lspci and setpci to see that the configuration space of the PCI board is ok.
I use setpci to read the Base Address Registers of the configuration space. I have a very simple program in C -see below- to read data from the board. The start address from which I start reading data is that from the Base Address Register.
On the board side I have the following VHDL code to talk to the wishbone bus.
wbm_err_i http://www.opencores.org/forums.cgi/pci/attachments/20051206/577b671b/attachment.html
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how to use the PCI bridge IP core ?
by Unknown on Dec 7, 2005 |
Not available! | ||
Robert LluÃs Garcia wrote:
On the board side I have the following VHDL code to talk to the wishbone
bus. wbm_err_i wbm_rty_i wbm_ack_i wbm_dat_i Looks OK to me so far... (I'd use wbm_dat_i
Now, the data read by the C program is not what I would expect. I would
What data are you getting back? Is it consistent? Constant or random?
I haven't used /dev/mem to access PCI space before as I've only accessed
PCI space in a linux driver, so I can't vouch for your code but it looks OK.
If you want to eliminate your code from the equation just to verify the
firmware, create a DOS boot floppy and put a copy of CDBG on it. It has
a simple CLI for twiddling PCI resources - you'll be up and running in a
matter of minutes - invaluable!
http://www.probo.com/cdbg.htm>
Regards,
--
Mark McDougall, Software Engineer
Virtual Logic Pty Ltd, http://www.vl.com.au>
21-25 King St, Rockdale, 2216
Ph: +612-9599-3255 Fax: +612-9599-3266
expect to read always the value in wbm_dat_i but it is not like that so something is wrong. |
how to use the PCI bridge IP core ?
by Unknown on Dec 7, 2005 |
Not available! | ||
Hi,
I found what I was doing wrong. I was reading from the address pointed by
BAR0 that is used for configuration space. I have had to enable another
BAR, by uncommenting a define in the code, and read from this one.
By using dbg.exe I realized I was reading the configuration space so thanks
for the replays.
Regards,
Robert
----- Original Message -----
From: "Mark McDougall" markm at vl.com.au>
To: rlluis at promax.es>; "Discussion list about free, open source PCI IP
core" pci at opencores.org>
Sent: Wednesday, December 07, 2005 12:44 AM
Subject: Re: [pci] how to use the PCI bridge IP core ?
Robert LluÃs Garcia wrote:
On the board side I have the following VHDL code to talk to the wishbone
bus. wbm_err_i wbm_rty_i wbm_ack_i wbm_dat_i Looks OK to me so far... (I'd use wbm_dat_i
Now, the data read by the C program is not what I would expect. I would
What data are you getting back? Is it consistent? Constant or random?
I haven't used /dev/mem to access PCI space before as I've only accessed
PCI space in a linux driver, so I can't vouch for your code but it looks
OK.
If you want to eliminate your code from the equation just to verify the
firmware, create a DOS boot floppy and put a copy of CDBG on it. It has a
simple CLI for twiddling PCI resources - you'll be up and running in a
matter of minutes - invaluable!
http://www.probo.com/cdbg.htm>
Regards,
--
Mark McDougall, Software Engineer
Virtual Logic Pty Ltd, http://www.vl.com.au>
21-25 King St, Rockdale, 2216
Ph: +612-9599-3255 Fax: +612-9599-3266
expect to read always the value in wbm_dat_i but it is not like that so something is wrong. |
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