![no use](https://cdn.opencores.org/img/pils_lt.png)
![no use](https://cdn.opencores.org/img/pil_lt.png)
![no use](https://cdn.opencores.org/img/pil_rt.png)
![no use](https://cdn.opencores.org/img/pils_rt.png)
Bridge
by fjcastillo on Apr 19, 2010 |
fjcastillo
Posts: 2 Joined: Jun 10, 2009 Last seen: Jun 12, 2013 |
||
Hi!!I want to realize a pci core. I have seen the http://www.opencores.org/project,pci, however it is not valid for my proyect because it has a bus wishbone so i want a bus standar
(Seemed plx9030). I would like to know if someone has experience in a similar proyect, because I am a bit confuse and I dont know where to begin |
![no use](https://cdn.opencores.org/img/pils_lt.png)
![no use](https://cdn.opencores.org/img/pil_lt.png)
![no use](https://cdn.opencores.org/img/pil_rt.png)
![no use](https://cdn.opencores.org/img/pils_rt.png)