Hi everybody,
for my thesis work I am working on interfacing a board (with an FPGA above) for the monitoring of certain events with the PCI bus.

First of all I want to thanks all those who share their IP on opencore and thus allowing the newbie to learn the craft.

That said I wanted to try to use PCI Target PCI32TLITE core available here on opencores (version R03). I wanted to first simulate this version (PCI32TLITE) to understand how it works and thus how use this in my project.
To do this I was trying to replace unit TOP of the testbench (pci_bridge32 of the PCI BRIDGE project) with the module pci32tLite. Actually I'm not succeeding in my idea because I can not handle the immense code of tesbench.

I would be so very grateful if someone could help me or maybe give me some suggestions about how to realize this thing.

My question is:
What should I change in order to use the testbench of the PCI BRIDGE project with the module Pci32tLite? Is this possible?
Thank you in advance,
Riccardo

Hi,

I have the same problem.
I am trying to find a easy and simple PCI signals generator to test basic PCI transaction on a target like PCI32Tlite, but difficult to find.