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PCIe 3.0
by rakeshsachdev2003 on Mar 16, 2018
rakeshsachdev2003
Posts: 3
Joined: Mar 16, 2018
Last seen: Mar 17, 2018
Hi All, If anyone has any questions related to the PCIe Gen 3.0 specification then let me know. I would be more that happy to discuss questions and concerns! I am expert in VIP development and DUT debug as well! I can assist with those kinds of questions as well!
RE: PCIe 3.0
by aborga on Mar 16, 2018
aborga
Posts: 23
Joined: Dec 15, 2008
Last seen: Oct 7, 2024
Hi rakeshsachdev2003, did you have a look at this popular PCIe Gen 3.0 DMA Engine: opencores.org/project,virtex7_pcie_dma || you might want to study it to see if it can be ported to other Xilinx (or non) FPGA platforms. Cheers, Andrea.
RE: PCIe 3.0
by Tom_HDL on Apr 5, 2018
Tom_HDL
Posts: 1
Joined: May 2, 2017
Last seen: Feb 20, 2021
Hello everyone,I want to develop serial interface system,but I don't understand these coding theroy like NRZI etc, can you introduce some book or valuable reference to me?
RE: PCIe 3.0
by gdhar75 on Oct 11, 2022
gdhar75
Posts: 1
Joined: Aug 27, 2008
Last seen: May 25, 2024
Hi rakeshsachdev2003, did you have a look at this popular PCIe Gen 3.0 DMA Engine: opencores.org/project,virtex7_pcie_dma || you might want to study it to see if it can be ported to other Xilinx (or non) FPGA platforms. Cheers, Andrea.
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