1/1
USB 1.1 host controller: SET ADDRESS is ACK'ed, but ignored
by Unknown on Dec 2, 2003 |
Not available! | ||
I am trying to write an USB 1.1 host controller to connect a usb video
camera to the Xilinx FPGA. I am having strange problems with Set Address
Command - it is recieved and ACKed, but the device still does not respond
to the command.
I am using usb_phy from "USB 1.1 Function IP Core" and PDIUSBP11A for UTMI
and hardware interface. I was able to read the device descriptor, so I
believe that the physical part of the protocol works.
I do not have USB bus analyzer, but logic analyzer shows the following:
-30ms..0ms: "reset" hit. the bus is in SE0 state
0ms..15ms: reset recovery. Only SOF packets are being sent
16ms:
host sends SOF,
host waits 64 bit times
host sends "SETUP to Pipe0 Device0", 2D 00 10
host sends DATA0, "set address to 4":
C3 00 05 04 00 00 00 00 00 EB 70
device sends ACK ( D2 )
17ms:
host sends SOF,
host waits 64 bit times
host sends "IN from Pipe0 Device0", 69 00 10
device sends empty DATA1 packet: 4B 00 00
host waits 32 bit times
host ACK's packets: D2
18ms..31ms: idle time, sending SOF only
32ms:
host sends SOF,
host waits 64 bit times
host sends "SETUP to Pipe0 Device4", 2D 04 28
host sends DATA0, "get descriptor":
C3 80 06 00 01 00 00 12 00 E0 F4
now, the device is supposed to ACK the packet, but it does not
device does not send anything.
What could be wrong here?
I will be happy to provide any additional information.
Mikhail
--
To unsubscribe from usb mailing list please visit http://www.opencores.org/mailinglists.shtml
|
USB 1.1 host controller: SET ADDRESS is ACK'ed, but ignored
by Unknown on Dec 2, 2003 |
Not available! | ||
On Tue, 2003-12-02 at 11:53, Mikhail A wrote:
I am trying to write an USB 1.1 host controller to connect a usb video
camera to the Xilinx FPGA. I am having strange problems with Set Address Command - it is recieved and ACKed, but the device still does not respond to the command. I am using usb_phy from "USB 1.1 Function IP Core" and PDIUSBP11A for UTMI and hardware interface. I was able to read the device descriptor, so I believe that the physical part of the protocol works. ... Make sure your setup sequence is correct (see page 226 of the USB 2.0 spec for more details). Basically your SETUP sequence looks like this: SETUP -> DATA -> STATUS When you start "set address", the *entire* sequence will be completed with the default address of '0'. Only after the STATUS phase will the new address become valid. See also the second paragraph from the end of the page 256 in USB 2.0 spec.
What could be wrong here?
Regards,
rudi
========================================================
ASICS.ws ::: Solutions for your ASIC/FPGA needs :::
..............::: FPGAs * Full Custom ICs * IP Cores :::
FREE IP Cores -> http://www.asics.ws/ http://www.opencores.org/mailinglists.shtml
I will be happy to provide any additional information. Mikhail |
1/1