I want to implement the USB2.0 core into my cyclone device. I
downloaded the tar file but there is no synthesis information anywhere.
Has this core been implemented in an FPGA? in an Altera FPGA? in an
Altera Cylcone FPGA?

I don't have any idea about how many resources it takes. If there is an
existing Quartus project out there it would be greatly appreciated.

Thanks,

Michael Hallak-Stamler