hello,

now i got the USB1.1 function core working with the SMSC GT3200 PHY
chip. (little changings in usb1_utmi_if.v and usb_pa.v, because the tx-
ready signals have different length)

but windows dont accepts the enumeration :-(

it asks for 64Byte device-descriptor, but since this is only 18Byte long, i
am sending these 18 bytes (the original usb1_ctrl.v does so)
after PC had recieved these 18 bytes it sends again an IN-Token, to
wich the fpga replies with Zero-length-packet.

a lot of miliseconds later the PC sets an USB-RESET and asks again for
64 byte device-descriptor...
this repeats 3 times.. then it stops...

what do i have to do?
sending these 18 bytes only in packets a 8 byte?
sending 64 bytes? wich bytes?

or could it be, that my device-descriptor is wrong?

7'h00: dout 7'h01: dout 7'h02: dout 7'h03: dout 7'h04: dout 7'h05: dout 7'h06: dout 7'h07: dout 7'h08: dout 7'h09: dout 7'h0a: dout 7'h0b: dout 7'h0c: dout 7'h0d: dout 7'h0e: dout 7'h0f: dout 7'h10: dout 7'h11: dout
thank you very much!
best regards
Suheel

----- Original Message ----- From: info@s...info@s...> To: Date: Wed Nov 17 11:59:38 CET 2004 Subject: [usb] Enumeration...
PHY


I have got exactly the same problem.
Do you send the 18 bytes device descriptor in chunks of 8 bytes
packets?
I realised that you also should transmit the zero len packet after each 8
byte packet.
How do you send the last 2 bytes?
Do you receive the reset command from the host after sending the 1rst
8 bytes? Do you receive the SET_ADDRESS request?

PHY






Hello,
now, i made a little progress..

i found, that i had some problems with the handshaking with the GT3200
because the gt3200 assumes, that the first 3 bytes come with each clock. (it
sets the first txReady for 3-4 clocks and not only one clock, like the PHY-Core
form opencores does.

after correcting these issues, the procedure was following:

PC asks for 64bytes of descr.
FPGA sends 18 byte in one packet.
PC sets USB-reset
PC sends SET-ADress-comand.
FPGA ack
PC asks for 18 bytes dev descriptor with new adress
fpga replys
pc asks for 9 byte of 2nd descriptor
fpga replys
pc asks for 255 bytes of 2nd descriptor
fpga replies..

an then there are 2 USB-resets.. and nothing else...
pc says device not working corrctly..

i musst say, that while i measured the procedure above, there were CRC-errors. i
fixed this today(usb1_idma.v and fifo2.v), but could not test it on a
logicanalyzer yet.. pc still doesn't accept it :-(
simulation is ok. :-/

best regards
suheel