OpenCores

OpenCores

USB 2.0 function core experience

no use

no use

1/1

no use

no use

USB 2.0 function core experience by Unknown on May 15, 2006			Not available!
Hello All! We're currently busy implementing the USB 2.0 function core into an Altera Cyclone. First we translated the verilog code into VHDL. The next step was to verify the VHDL with the verilog. That is almost done right now. We are using 2 external PHY's: the USB3300 (SMSC) and the ISP1504 (Philips). Both PHY's have an ULPI interface, and the OC IP core has an UTMI interface, so we're busy making a wrapper. The core has to communicate with an Altera NIOS II Softcore processor. Now I was wondering if anyone has experience with this core and NIOS. I have to write a driver but I don't really know how to do that. At the PC side I also have to write a driver, perhaps I could use Jungo WinDriver? We are also trying to build a host controller, but this is too complex. So, if there is anyone who has experience with this core and NIOS, please share it with us. Perhaps we can help you also... Kind regards, Martin Bosma -------------- next part -------------- An HTML attachment was scrubbed... URL: <A HREF="http://www.opencores.org/forums.cgi/usb/attachments/20060515/a6dd8d74/attachment.html">http://www.opencores.org/forums.cgi/usb/attachments/20060515/a6dd8d74/attachment.html</A> Hello All! We're currently busy implementing the USB 2.0 function core into an Altera Cyclone. First we translated the verilog code into VHDL. The next step was to verify the VHDL with the verilog. That is almost done right now. We are using 2 external PHY's: the USB3300 (SMSC) and the ISP1504 (Philips). Both PHY's have an ULPI interface, and the OC IP core has an UTMI interface, so we're busy making a wrapper. The core has to communicate with an Altera NIOS II Softcore processor. Now I was wondering if anyone has experience with this core and NIOS. I have to write a driver but I don't really know how to do that. At the PC side I also have to write a driver, perhaps I could use Jungo WinDriver? We are also trying to build a host controller, but this is too complex. So, if there is anyone who has experience with this core and NIOS, please share it with us. Perhaps we can help you also... Kind regards, Martin Bosma -------------- next part -------------- An HTML attachment was scrubbed... URL: http://www.opencores.org/forums.cgi/usb/attachments/20060515/a6dd8d74/attachment.html

RE: USB 2.0 function core experience by jfjardin on Jan 19, 2012			jfjardin Posts: 1 Joined: Nov 17, 2011 Last seen: Dec 14, 2016
I think libUSB can help you make a driver for the host I think libUSB can help you make a driver for the host

RE: USB 2.0 function core experience by ravivlsiii on Jan 22, 2012			ravivlsiii Posts: 45 Joined: Jul 4, 2008 Last seen: Feb 8, 2014
contact me for more details ....ravilife4rohit@yahoo.com Regards, RC contact me for more details ....ravilife4rohit@yahoo.com Regards, RC

RE: USB 2.0 function core experience by ravivlsiii on Sep 24, 2013			ravivlsiii Posts: 45 Joined: Jul 4, 2008 Last seen: Feb 8, 2014
Thx Thx

RE: USB 2.0 function core experience by dhp_77 on Jun 5, 2014			dhp_77 Posts: 1 Joined: Jun 4, 2014 Last seen: Jul 8, 2017
[q]Hello All! We're currently busy implementing the USB 2.0 function core into an Altera Cyclone. First we translated the verilog code into VHDL. The next step was to verify the VHDL with the verilog. That is almost done right now. We are using 2 external PHY's: the USB3300 (SMSC) and the ISP1504 (Philips). Both PHY's have an ULPI interface, and the OC IP core has an UTMI interface, so we're busy making a wrapper. The core has to communicate with an Altera NIOS II Softcore processor. Now I was wondering if anyone has experience with this core and NIOS. I have to write a driver but I don't really know how to do that. At the PC side I also have to write a driver, perhaps I could use Jungo WinDriver? We are also trying to build a host controller, but this is too complex. So, if there is anyone who has experience with this core and NIOS, please share it with us. Perhaps we can help you also... Kind regards, Martin Bosma -------------- next part -------------- An HTML attachment was scrubbed... URL: <A HREF="http://www.opencores.org/forums.cgi/usb/attachments/20060515/a6dd8d74/attachment.html">http://www.opencores.org/forums.cgi/usb/attachments/20060515/a6dd8d74/attachment.html</A> [/q] Hello All! We're currently busy implementing the USB 2.0 function core into an Altera Cyclone. First we translated the verilog code into VHDL. The next step was to verify the VHDL with the verilog. That is almost done right now. We are using 2 external PHY's: the USB3300 (SMSC) and the ISP1504 (Philips). Both PHY's have an ULPI interface, and the OC IP core has an UTMI interface, so we're busy making a wrapper. The core has to communicate with an Altera NIOS II Softcore processor. Now I was wondering if anyone has experience with this core and NIOS. I have to write a driver but I don't really know how to do that. At the PC side I also have to write a driver, perhaps I could use Jungo WinDriver? We are also trying to build a host controller, but this is too complex. So, if there is anyone who has experience with this core and NIOS, please share it with us. Perhaps we can help you also... Kind regards, Martin Bosma -------------- next part -------------- An HTML attachment was scrubbed... URL: http://www.opencores.org/forums.cgi/usb/attachments/20060515/a6dd8d74/attachment.html

RE: USB 2.0 function core experience by studleylee on Jun 5, 2014			studleylee Posts: 11 Joined: Dec 7, 2004 Last seen: Mar 11, 2024
This yielded good info: https://www.google.com/search?q=writing+USB+driver This yielded good info: https://www.google.com/search?q=writing+USB+driver

no use

no use

1/1

no use

no use

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.