Hello,

My question is like in subject.
Does anyone have implemented 'USB 2.0 Function Core' from here?
How large external ssram memory have you used?
What chip have you used for fpga and usb transciver?
What problems did You meet?

regards

tj

probably answer is 128Kb

following the doc

3.4. USB Core Memory Size
This USB core includes a memory block which it uses for storing data and end-
point control information. The memory is 32 bits wide. Depending on the applica-
tion, the user should choose the appropriate memory size for the buffer memory.
Based on the actual number of endpoints and application, the memory can be
as small as 256 bytes. The maximum supported memory size is 128 Kilobytes.

Many PIC processors with USB capability have only 4 KB of SRAM, and I find that to be plenty even considering that most of it is used for non-USB data. I'm not sure why 32-bit memory is used, considering that USB is an 8-bit protocol. So, even if the 32-bit memory is inefficiently used, you shouldn't need more than 16 KB (4 KW) of SRAM. The real answer depends upon what you want to accomplish. Only a rare few USB Devices will need as much as 128 KB (32 KW), most will need much less.

hello, Rsdio

>Many PIC processors with USB capability

Do you mean devices like PIC-USB-4550? such devices are too big and need too much voltage for my design.

>depends upon what you want to accomplish.

I'm going to design small and (cheap as possible) usb device with usb3280 PHY and actel proasic3 a3pn250 (and some ssram).
I dont know if usb3280 (http://www.smsc.com/index.php?pid=26&tid=143) is good choice but is small, need 3.3v and has utmi interface what support 'USB 2.0 Function Core' ip core.do You know better usb 2.0 transceiver?

I was wondering how big sram chip I need. I think I will use 128Kb (following the documentation) + 128 for my needs.

I'm not going to programming fpga via usb (i will use jtag for that). usb will transfer data from/to fpga implemented as coprocessor.

regards,

tj

I have used the PIC18F67J50, which only requires 3.3V power supply. Microchip has many PIC variations, and their web site has a handy selection tool so you can find the best fit for your needs. There is also the PIC24 and dsPIC, among others.

Unfortunately, I have not worked with High Speed USB on PIC, and I cannot even remember whether they support it. A quick scan of their web site did not find anything, but that's not very conclusive.

I really only mentioned the PIC as an example of the amount of SRAM needed. If they can ship a PIC with only 4 KB of SRAM for USB and other functions, then it seems like that would be plenty for at least some USB implementations. The specifications for the Core do say minimum of 256 bytes, so you do not absolutely need 128 KB. If 128 KB is cheap, though, then you might as well provide whatever SRAM amount is cheap, so long as your application will not need more.

There are other companies like Cypress EZ-USB FX2 that support High Speed USB in a general purpose MCU. With such a chip as the FX2, you would not even need the USB 2.0 Function Core at all. You could delete the FPGA unless you need it for something besides USB.

I'm a little confused when you mention the USB3280 PHY at the same time as the ProASIC3. I am not familiar with either one. My first question would be whether there is any overlap between the USB 2.0 Function Core and the PHY. It seems possible that some of the same features may be implemented in both, making the Core larger than it needs to be. I guess the real question is what kind of PHY the Core was designed to be used with. Others have replied who are more familiar with this Core, so I leave it to them to answer.