I have couple of questions regarding design and implementation of DDR PHY.

what is the internal architecture of a basic DDR PHY?
Is there a architecture specification available for DDR PHY desgin?
what are all the essential EDA tools that will be required to design, implement and sign-off DDR PHY?
what are the reference books, for learning DDR PHY design?

Thanks In advance.

I'm not sure why you posted in the USB forum, DDR refers to a memory implementation that is quite independent of the USB protocol. That said ...

You can find a lot of information regarding the logic necessary to control a DDR SDRAM on wikipedia first, from specification sheets for the DDR SDRAM you are intending to control, or even from looking at how others have done it.

This isn't necessarily the same as the physical wiring necessary to connect a DDR SDRAM to an FPGA (or other) controller, but rather the logic necessary to pass over those wires.

Is this what you are looking for?

Dan

Here's another page worth reading to understand what you are trying to do.

Dan