VTACH - Bell Labs CARDIAC reimagined in Verilog :: Overview

Project maintainers


Name: vtach
Created: Jun 28, 2013
Updated: Mar 30, 2014
SVN Updated: Jun 29, 2013
SVN: Browse
Latest version: download (might take a bit to start...)
Statistics: View
Bugs: reported / solved

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Other project properties

Category: Processor
Language: Verilog
Development status: Mature
Additional info: none
WishBone compliant: No
WishBone version: n/a
License: LGPL


Verilog implementation of the old CARDIAC teaching computer from Bell (the one made out of cardboard). This version runs on a Spartan 3 board from Digilent and it is pretty faithful to the original.

Documentation about the project:

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