OpenCores

VTACH - Bell Labs CARDIAC reimagined in Verilog

Project maintainers

Details

Name: vtach
Created: Jun 28, 2013
Updated: Nov 26, 2019
SVN Updated: Jun 29, 2013
SVN: Browse
Latest version: download (might take a bit to start...)
Statistics: View
Bugs: 1 reported / 0 solved
Star1you like it: star it!

Other project properties

Category:Processor
Language:Verilog
Development status:Mature
Additional info:
WishBone compliant: No
WishBone version: n/a
License: LGPL

Description

Verilog implementation of the old CARDIAC teaching computer from Bell (the one made out of cardboard). This version runs on a Spartan 3 board from Digilent and it is pretty faithful to the original.

Documentation about the project: